| ApossC SDK V01.15

SdoDictionary.mh
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1 #pragma once
2 #define sdodictionary_h // For backwards compatibility in case user programs use this #define.
3
4 //=================================================================================================================
5 // SDO Defines
6 //=================================================================================================================
7
8 #define SDOSUBCLASS(index) (index & 0xFFC0) // important for firmware !!!!
9
10 #define PISRC_NOTDEFINED 0x0000
11
12 // General definition for SDO Read and Write
13 #define SDO_INTERNAL(ind,subindex) Sysvar[(0x01000000 | (((long) (ind ))<<8)) | ((long) (subindex))]
14 #define SDO_DIMARRAY(arrno,index) Sysvar[(0x01210005 | (((long) (arrno))<<8)) + ((long) (index)))]
15
16 //=================================================================================================================
17 // 0x2100 APOSS_ARRAY - Aposs Array
18 //=================================================================================================================
22 #define SDOINDEX_APOSS_ARRAY 0x2100
23
28 #define APOSS_ARRAY_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_APOSS_ARRAY<<8)) | (((long) (modno))<<8) | ((long) (parno)))
29
34 #define APOSS_ARRAY_SRCINDEX(modno,parno) ((SDOINDEX_APOSS_ARRAY<<8) | (((long) (modno))<<8) | ((long) (parno)))
35
40 #define APOSS_ARRAY(modno,parno) Sysvar[APOSS_ARRAY_INDEX((modno),(parno))]
41
44 #define APOSS_ARRAY_MAX 255
45
46 //=================================================================================================================
47 // 0x2200 GLB_PARAM - Global Parameters
48 //=================================================================================================================
52 #define SDOINDEX_GLB_PARAM 0x2200
53
57 #define GLB_PARAM_INDEX(parno) ((0x01000000 | (SDOINDEX_GLB_PARAM<<8)) | ((long) (parno)))
58
62 #define GLB_PARAM_SRCINDEX(parno) ((SDOINDEX_GLB_PARAM<<8) | ((long) (parno)))
63
67 #define GLB_PARAM(parno) Sysvar[GLB_PARAM_INDEX(parno)]
68
71 #define GLB_PARAM_MAX 102
72
80 #define CANNR 1
81
87 #define CANBAUD 2
88
96 #define PRGPAR 3
97
105 #define I_ERRCLR 8
106
114 #define O_ERROR 9
115
121 #define RSBAUDRATE 13
122
132 #define CANSYNCTIMER 15
133
140 #define CANGUARDTIMER 16
141
154 #define IPADDRESSMODE 20
155
162 #define IPSUBNET 21
163
180 #define PRGSTARTCOND 22
181
194 #define ESCCONDGLB 23
195
201 #define IPMASK 24
202
208 #define IPDEFAULTGW 25
209
215 #define CANNRFORCE 26
216
217
218 // Values for ESCCONDGLB:
219 #define GLB_PARAM_ESCCONDGLB_NOTHING 0 // The actual values of the outputs are not changed.
220 #define GLB_PARAM_ESCCONDGLB_OUT_OFF 1 // Set all outputs to 0
221 #define GLB_PARAM_ESCCONDGLB_OUT_ON 2 // Set all outputs to 1
222
223 //=================================================================================================================
224 // 0x2201 USER_PARAM - User Parameters
225 //=================================================================================================================
229 #define SDOINDEX_USER_PARAM 0x2201
230
234 #define USER_PARAM_INDEX(parno) ((0x01000000 | (SDOINDEX_USER_PARAM<<8)) | ((long) (parno)))
235
239 #define USER_PARAM_SRCINDEX(parno) ((SDOINDEX_USER_PARAM<<8) | ((long) (parno)))
240
244 #define USER_PARAM(parno) Sysvar[USER_PARAM_INDEX(parno)]
245
248 #define USER_PARAM_MAX 101
249
250 //=================================================================================================================
251 // 0x2202 SYS_PROCESS - System Process Data
252 //=================================================================================================================
256 #define SDOINDEX_SYS_PROCESS 0x2202
257
261 #define SYS_PROCESS_INDEX(parno) ((0x01000000 | (SDOINDEX_SYS_PROCESS<<8)) | ((long) (parno)))
262
266 #define SYS_PROCESS_SRCINDEX(parno) ((SDOINDEX_SYS_PROCESS<<8) | ((long) (parno)))
267
271 #define SYS_PROCESS(parno) Sysvar[SYS_PROCESS_INDEX(parno)]
272
275 #define SYS_PROCESS_MAX 143
276
281 #define SYS_INBYTE_0 2
282
287 #define SYS_INBYTE_1 3
288
293 #define SYS_INBYTE_2 4
294
299 #define SYS_INBYTE_3 5
300
305 #define SYS_INBYTE_4 6
306
311 #define SYS_INBYTE_5 7
312
317 #define SYS_INBYTE_6 8
318
323 #define SYS_INBYTE_7 9
324
329 #define SYS_OUTBYTE_0 10
330
335 #define SYS_OUTBYTE_1 11
336
341 #define SYS_OUTBYTE_2 12
342
347 #define SYS_OUTBYTE_3 13
348
353 #define SYS_OUTBYTE_4 14
354
359 #define SYS_OUTBYTE_5 15
360
365 #define SYS_OUTBYTE_6 16
366
371 #define SYS_OUTBYTE_7 17
372
373 #define SYS_AXSTATUS 18
374
379 #define SYS_INAD_1 19
380
385 #define SYS_INAD_2 20
386
391 #define SYS_INAD_3 21
392
397 #define SYS_INAD_4 22
398
403 #define SYS_CLOCK 23
404
409 #define SYS_USRSTAT 24
410
415 #define SYS_MAXAX 25
416
429 #define SYS_CAN_NODESTATE 26
430
437 #define SYS_TIMEINT_LENGTH 27
438
445 #define SYS_MAX_LOOPTIME 28
446
452 #define SYS_AMP0_CURRENT 29
453
454 #define SYS_NC_0 30
455
461 #define SYS_AMP0_VOLTAGE 31
462
468 #define SYS_AMP0_STATUS 32
469
475 #define SYS_AMP0_SPEED 33
476
483 #define SYS_CANDIP 34
484
491 #define SYS_CANOM_SDOABORT 35
492
499 #define SYS_HWANIN_UNFILT 36
500
506 #define SYS_CANERR_RX_0 37
507
513 #define SYS_CANERR_RX_1 38
514
518 #define SYS_CANERR_TX_0 39
519
523 #define SYS_CANERR_TX_1 40
524
532 #define SYS_MAXTIMEINT_LENGTH 41
533
540 #define SYS_HWCNTINC_0_VALUE 42
541
548 #define SYS_HWCNTINC_1_VALUE 43
549
556 #define SYS_HWCNTINC_2_VALUE 44
557
564 #define SYS_HWCNTINC_3_VALUE 45
565
572 #define SYS_HWCNTINC_4_VALUE 46
573
580 #define SYS_HWCNTINC_5_VALUE 47
581
588 #define SYS_HWCNTINC_6_VALUE 48
589
596 #define SYS_HWCNTINC_7_VALUE 49
597
604 #define SYS_HWCNTINC_8_VALUE 50
605
609 #define SYS_STACKSIZE 51
610
617 #define SYS_HWLATCH_0_VALUE 52
618
625 #define SYS_HWLATCH_1_VALUE 53
626
633 #define SYS_HWLATCH_2_VALUE 54
634
641 #define SYS_HWLATCH_3_VALUE 55
642
649 #define SYS_HWLATCH_4_VALUE 56
650
657 #define SYS_HWLATCH_5_VALUE 57
658
665 #define SYS_HWLATCH_6_VALUE 58
666
673 #define SYS_HWLATCH_7_VALUE 59
674
681 #define SYS_HWLATCH_8_VALUE 60
682
688 #define SYS_EEPROM_SIZE 61
689
695 #define SYS_US_TIMER 62
696
703 #define SYS_CANOS_TIM_LASTTXPDO 63
704
711 #define SYS_CANOM_SDO_TIMEOUT 64
712
716 #define SYS_ECAT_NODESTATE 65
717
721 #define SYS_ECAT_PDOLENGTH_IN 66
722
726 #define SYS_ECAT_PDOLENGTH_OUT 67
727
732 #define SYS_CANOM_GUARDERR_ID 68
733
742 #define SYS_CANOM_MASTERSTATE 69
743
744 #define SYS_UART_BYTECOUNT 70
745
759 #define SYS_HWCNTINC_0_STATUS 72
760
774 #define SYS_HWCNTINC_1_STATUS 73
775
789 #define SYS_HWCNTINC_2_STATUS 74
790
804 #define SYS_HWCNTINC_3_STATUS 75
805
819 #define SYS_HWCNTINC_4_STATUS 76
820
834 #define SYS_HWCNTINC_5_STATUS 77
835
849 #define SYS_HWCNTINC_6_STATUS 78
850
864 #define SYS_HWCNTINC_7_STATUS 79
865
879 #define SYS_HWCNTINC_8_STATUS 80
880
885 #define SYS_HWLATCH_COUNT_0 93
886
891 #define SYS_HWLATCH_COUNT_1 94
892
897 #define SYS_HWLATCH_COUNT_2 95
898
903 #define SYS_HWLATCH_COUNT_3 96
904
909 #define SYS_HWLATCH_COUNT_4 97
910
915 #define SYS_HWLATCH_COUNT_5 98
916
921 #define SYS_HWLATCH_COUNT_6 99
922
927 #define SYS_HWLATCH_COUNT_7 100
928
933 #define SYS_HWLATCH_COUNT_8 101
934
940 #define SYS_TIMEINT_DIFF 104
941
954 #define SYS_LED_0_CONTROL 110
955
968 #define SYS_LED_1_CONTROL 111
969
982 #define SYS_LED_2_CONTROL 112
983
996 #define SYS_LED_3_CONTROL 113
997
1010 #define SYS_LED_4_CONTROL 114
1011
1024 #define SYS_LED_5_CONTROL 115
1025
1030 #define SYS_INAD_5 116
1031
1036 #define SYS_INAD_6 117
1037
1048 #define SYS_TIME_DAY 118
1049
1055 #define SYS_TIME_TOD 119
1056
1060 #define SYS_RTC_DATE 120
1061
1065 #define SYS_RTC_TIME 121
1066
1070 #define SYS_TIMER_GETDAY 122
1071
1075 #define SYS_TIMER_GETTIMEOFDAY 123
1076
1080 #define SYS_GETMAXINHIBITTIME 124
1081
1085 #define SYS_PRETIMEINT_LENGTH 125
1086
1090 #define SYS_MAXPRETIMEINT_LENGTH 126
1091
1095 #define SYS_PRETIMEINT_DIFF 127
1096
1100 #define SYS_MAXPRETIMEINT_DIFF 128
1101
1105 #define SYS_MAXTIMEINT_DIFF 129
1106
1110 #define SYS_CAN_NR_OF_SYNC 130
1111
1119 #define SYS_CANOM_SEND_NMT 131
1120
1124 #define SYS_STACKUSAGE 132
1125
1129 #define SYS_STACKMAX 133
1130
1134 #define SYS_BL_STATUS 134
1135
1141 #define SYS_TEMPERATURE 135
1142
1146 #define SYS_FWSTACKMAX 136
1147
1151 #define SYS_CURINT_LENGTH 137
1152
1156 #define SYS_MAXCURINT_LENGTH 138
1157
1161 #define SYS_CURINT_DIFF 139
1162
1166 #define SYS_MAXCURINT_DIFF 140
1167
1173 #define SYS_CPU_TEMPERATURE 141
1174
1178 #define SYS_CAN_SYNC_OFFSET 142
1179
1180
1181 //=================================================================================================================
1182 // 0x2209 SYS_INFO - System Information
1183 //=================================================================================================================
1187 #define SDOINDEX_SYS_INFO 0x2209
1188
1192 #define SYS_INFO_INDEX(parno) ((0x01000000 | (SDOINDEX_SYS_INFO<<8)) | ((long) (parno)))
1193
1197 #define SYS_INFO_SRCINDEX(parno) ((SDOINDEX_SYS_INFO<<8) | ((long) (parno)))
1198
1202 #define SYS_INFO(parno) Sysvar[SYS_INFO_INDEX(parno)]
1203
1206 #define SYS_INFO_MAX 77
1207
1212 #define SYS_HARDWARE_ID 1
1213
1218 #define SYS_FW_CPU 2
1219
1224 #define SYS_CUSTOMER_ID 3
1225
1229 #define SYS_MAX_AXES 5
1230
1240 #define SYS_FPGA_SW_VERSION 6
1241
1245 #define SYS_BOOTLOADER_SW_VERSION 7
1246
1251 #define SYS_APP_VERSION_INFO1 8
1252
1257 #define SYS_APP_VERSION_INFO2 9
1258
1262 #define SYS_NUMBER_OF_INTEGRATED_AMPLIFIERS 10
1263
1267 #define SYS_INTERNAL_FLASH_MEMORY 11
1268
1272 #define SYS_FW_AMPLIFIER_VERSION 12
1273
1277 #define SYS_FW_COPROCESSOR_VERSION 13
1278
1283 #define SYS_IP_ADDRESS_CONTROLLER 14
1284
1291 #define SYS_ANALOG_OPTION_TYPE 15
1292
1298 #define SYS_SD_CARD_STATUS 16
1299
1303 #define SYS_MAX_VIRTMAST 20
1304
1308 #define SYS_MAX_VIRTCOUNTIN 21
1309
1313 #define SYS_MAX_VIRTLATCH 22
1314
1318 #define SYS_MAX_VIRTAMP 23
1319
1323 #define SYS_MAX_VIRTDIGIN 24
1324
1328 #define SYS_MAX_VIRTDIGOUT 25
1329
1333 #define SYS_MAX_VIRTANIN 26
1334
1338 #define SYS_MAX_VIRTANOUT 27
1339
1343 #define SYS_MAX_DIM_ARRAYS 28
1344
1348 #define SYS_MAX_VIRTCUSTOMMOD 29
1349
1353 #define SYS_MAX_VIRTMATH 30
1354
1358 #define SYS_ZB_AMP_NO 40
1359
1363 #define SYS_MAX_ENCODER 41
1364
1368 #define SYS_MAX_CNTINC 42
1369
1373 #define SYS_MAX_CNTABS 43
1374
1378 #define SYS_MAX_CNTUNI 44
1379
1383 #define SYS_MAX_COMPARATORS 45
1384
1388 #define SYS_MAX_LATCH 46
1389
1393 #define SYS_MAX_SIGGEN 47
1394
1398 #define SYS_MAX_DDS 48
1399
1403 #define SYS_MAX_PULSGEN 49
1404
1409 #define SYS_MAX_DIGIN 50
1410
1415 #define SYS_MAX_DIGOUT 51
1416
1420 #define SYS_MAX_ANIN 52
1421
1425 #define SYS_MAX_ANOUT 53
1426
1430 #define SYS_MAX_BRENCREF 54
1431
1435 #define SYS_MAX_BRREFENC 55
1436
1440 #define SYS_MAX_BUSINFO 56
1441
1445 #define SYS_MAX_REFBUS 57
1446
1450 #define SYS_MAX_HALL 58
1451
1455 #define SYS_MAX_PWMGEN 59
1456
1460 #define SYS_MAX_BUSMOD 60
1461
1465 #define SYS_MAX_SHIFTREG 61
1466
1476 #define SYS_CONTROLLER_FEATURES 62
1477
1481 #define SYS_MAX_PDO_SDO_SIZE 63
1482
1486 #define SYS_MAX_XTLG_SIZE 64
1487
1491 #define SYS_BUILD_NUMBER 65
1492
1496 #define SYS_MAX_CANBUS 66
1497
1501 #define SYS_MAX_MACHINES 67
1502
1511 #define SYS_COMMOPT_PROTTYPE 68
1512
1516 #define SYS_HW_IDENTIFICATION 69
1517
1521 #define SYS_HW_INDEX 70
1522
1534 #define SYS_PLATFORM 71
1535
1542 #define SYS_RELEASE_TYPE 72
1543
1547 #define SYS_TG_VERSION 73
1548
1553 #define SYS_COMMOPT_INFO 74
1554
1559 #define SYS_UNIQUE_ID1 75
1560
1565 #define SYS_UNIQUE_ID2 76
1566
1567
1568 // Values for SYS_HW_IDENTIFICATION:
1569 #define SYS_HW_IDENTIFICATION_PC_ENC_OEM1 1 // PC Encoder Inrterface OEM1
1570 #define SYS_HW_IDENTIFICATION_PC_ENC_OEM2 2 // PC Encoder Inrterface OEM1
1571 #define SYS_HW_IDENTIFICATION_MICROMACS6 0 // MicroMACS6
1572 #define SYS_HW_IDENTIFICATION_MICROMACS6_MODULE 1 // MicroMACS6 Module
1573
1574 //=================================================================================================================
1575 // 0x2216 FPGA_REG - Read or write FPGA register
1576 //=================================================================================================================
1580 #define SDOINDEX_FPGA_REG 0x2216
1581
1585 #define FPGA_REG_INDEX(parno) ((0x01000000 | (SDOINDEX_FPGA_REG<<8)) | ((long) (parno)))
1586
1590 #define FPGA_REG_SRCINDEX(parno) ((SDOINDEX_FPGA_REG<<8) | ((long) (parno)))
1591
1595 #define FPGA_REG(parno) Sysvar[FPGA_REG_INDEX(parno)]
1596
1599 #define FPGA_REG_MAX 256
1600
1601 #define FPGAREG_FPGAFWVERS 1
1602
1603 #define FPGAREG_CLEAROVFL 2
1604
1605 #define FPGAREG_INCENC1POS 3
1606
1607 #define FPGAREG_INCENC2POS 4
1608
1609 #define FPGAREG_INCENC3POS 5
1610
1611 #define FPGAREG_INCENC4POS 6
1612
1613 #define FPGAREG_INCENC5POS 7
1614
1615 #define FPGAREG_INCENC6POS 8
1616
1617 #define FPGAREG_POSLATCH1 9
1618
1619 #define FPGAREG_POSLATCH2 10
1620
1621 #define FPGAREG_POSLATCH3 11
1622
1623 #define FPGAREG_POSLATCH4 12
1624
1625 #define FPGAREG_POSLATCH5 13
1626
1627 #define FPGAREG_POSLATCH6 14
1628
1629 #define FPGAREG_POSLATCH_FLAG 15
1630
1631 #define FPGAREG_ENC1QUADCNT 16
1632
1633 #define FPGAREG_ENC2QUADCNT 17
1634
1635 #define FPGAREG_ENC3QUADCNT 18
1636
1637 #define FPGAREG_ENC4QUADCNT 19
1638
1639 #define FPGAREG_ENC5QUADCNT 20
1640
1641 #define FPGAREG_ENC6QUADCNT 21
1642
1643 #define FPGAREG_U32CNT10 22
1644
1645 #define FPGAREG_U32CNT11 23
1646
1647 #define FPGAREG_U32CNT20 24
1648
1649 #define FPGAREG_U32CNT21 25
1650
1651 #define FPGAREG_U32CNT30 26
1652
1653 #define FPGAREG_U32CNT31 27
1654
1655 #define FPGAREG_U32CNT40 28
1656
1657 #define FPGAREG_U32CNT41 29
1658
1659 #define FPGAREG_SSI1POS0 30
1660
1661 #define FPGAREG_SSI1POS1 31
1662
1663 #define FPGAREG_SSI2POS0 32
1664
1665 #define FPGAREG_SSI2POS1 33
1666
1667 #define FPGAREG_SSI3POS0 34
1668
1669 #define FPGAREG_SSI3POS1 35
1670
1671 #define FPGAREG_SSIFLAG 36
1672
1673 #define FPGAREG_DIN 37
1674
1675 #define FPGAREG_DOUT 38
1676
1677 #define FPGAREG_REFVEC0 39
1678
1679 #define FPGAREG_REFVEC1 40
1680
1681 #define FPGAREG_REFVEC2 41
1682
1683 #define FPGAREG_REFVEC3 42
1684
1685
1686 //=================================================================================================================
1687 // 0x2217 FPGA_PARAM - Write custom specific parameters
1688 //=================================================================================================================
1692 #define SDOINDEX_FPGA_PARAM 0x2217
1693
1697 #define FPGA_PARAM_INDEX(parno) ((0x01000000 | (SDOINDEX_FPGA_PARAM<<8)) | ((long) (parno)))
1698
1702 #define FPGA_PARAM_SRCINDEX(parno) ((SDOINDEX_FPGA_PARAM<<8) | ((long) (parno)))
1703
1707 #define FPGA_PARAM(parno) Sysvar[FPGA_PARAM_INDEX(parno)]
1708
1711 #define FPGA_PARAM_MAX 256
1712
1713 #define FPGAPAR_REF_ENC_BRIDGE1_CNFGREG 2
1714
1715 #define FPGAPAR_REF_ENC_BRIDGE2_CNFGREG 3
1716
1717 #define FPGAPAR_ENC_REF_BRIDGE_CNFGREG 4
1718
1719 #define FPGAPAR_ENC1_3_MODEREG 5
1720
1721 #define FPGAPAR_ABR_QDZ_POLARITY_REG 6
1722
1723 #define FPGAPAR_DGX1_3_GLITCHFLTREG 7
1724
1725 #define FPGAPAR_DGX4_6_GLITCHFLTREG 8
1726
1727 #define FPGAPAR_ROT_SENSE_REG 9
1728
1729 #define FPGAPAR_POSCNT_1_CNFGREG 10
1730
1731 #define FPGAPAR_POSCNT_2_CNFGREG 11
1732
1733 #define FPGAPAR_POSCNT_3_CNFGREG 12
1734
1735 #define FPGAPAR_POSCNT_4_CNFGREG 13
1736
1737 #define FPGAPAR_POSCNT_5_CNFGREG 14
1738
1739 #define FPGAPAR_POSCNT_6_CNFGREG 15
1740
1741 #define FPGAPAR_Reserve15 16
1742
1743 #define FPGAPAR_POSLATCH_1_CNFGREG 17
1744
1745 #define FPGAPAR_POSLATCH_2_CNFGREG 18
1746
1747 #define FPGAPAR_POSLATCH_3_CNFGREG 19
1748
1749 #define FPGAPAR_POSLATCH_4_CNFGREG 20
1750
1751 #define FPGAPAR_POSLATCH_5_CNFGREG 21
1752
1753 #define FPGAPAR_POSLATCH_6_CNFGREG 22
1754
1755 #define FPGAPAR_Reserve22 23
1756
1757 #define FPGAPAR_Reserve23 24
1758
1759 #define FPGAPAR_Reserve24 25
1760
1761 #define FPGAPAR_VM1_CNFGREG 26
1762
1763 #define FPGAPAR_VM1_FREQ0REG 27
1764
1765 #define FPGAPAR_VM1_FREQ1REG 28
1766
1767 #define FPGAPAR_VM1_ZPULSE_RATIO 29
1768
1769 #define FPGAPAR_Reserve29 30
1770
1771 #define FPGAPAR_VM2_CNFGREG 31
1772
1773 #define FPGAPAR_VM2_FREQ0REG 32
1774
1775 #define FPGAPAR_VM2_FREQ1REG 33
1776
1777 #define FPGAPAR_VM2_ZPULSE_RATIO 34
1778
1779 #define FPGAPAR_Reserve34 35
1780
1781 #define FPGAPAR_VM3_CNFGREG 36
1782
1783 #define FPGAPAR_VM3_FREQ0REG 37
1784
1785 #define FPGAPAR_VM3_FREQ1REG 38
1786
1787 #define FPGAPAR_VM3_ZPULSE_RATIO 39
1788
1789 #define FPGAPAR_Reserve39 40
1790
1791 #define FPGAPAR_U32CNT_MODEREG 41
1792
1793 #define FPGAPAR_U32CNT1_CNFGREG 42
1794
1795 #define FPGAPAR_U32CNT2_CNFGREG 43
1796
1797 #define FPGAPAR_U32CNT3_CNFGREG 44
1798
1799 #define FPGAPAR_U32CNT4_CNFGREG 45
1800
1801 #define FPGAPAR_Reserve45 46
1802
1803 #define FPGAPAR_Reserve46 47
1804
1805 #define FPGAPAR_Reserve47 48
1806
1807 #define FPGAPAR_Reserve48 49
1808
1809 #define FPGAPAR_CMP1_CNFG_REG 50
1810
1811 #define FPGAPAR_CMP1_UPPERLEV_LOWWORD 51
1812
1813 #define FPGAPAR_CMP1_UPPERLEV_HIGHWORD 52
1814
1815 #define FPGAPAR_CMP1_LOWERLEV_LOWWORD 53
1816
1817 #define FPGAPAR_CMP1_LOWERLEV_HIGHWORD 54
1818
1819 #define FPGAPAR_Reserve54 55
1820
1821 #define FPGAPAR_CMP2_CNFG_REG 56
1822
1823 #define FPGAPAR_CMP2_UPPERLEV_LOWWORD 57
1824
1825 #define FPGAPAR_CMP2_UPPERLEV_HIGHWORD 58
1826
1827 #define FPGAPAR_CMP2_LOWERLEV_LOWWORD 59
1828
1829 #define FPGAPAR_CMP2_LOWERLEV_HIGHWORD 60
1830
1831 #define FPGAPAR_Reserve60 61
1832
1833 #define FPGAPAR_CMP3_CNFG_REG 62
1834
1835 #define FPGAPAR_CMP3_UPPERLEV_LOWWORD 63
1836
1837 #define FPGAPAR_CMP3_UPPERLEV_HIGHWORD 64
1838
1839 #define FPGAPAR_CMP3_LOWERLEV_LOWWORD 65
1840
1841 #define FPGAPAR_CMP3_LOWERLEV_HIGHWORD 66
1842
1843 #define FPGAPAR_Reserve66 67
1844
1845 #define FPGAPAR_CMP4_CNFG_REG 68
1846
1847 #define FPGAPAR_CMP4_UPPERLEV_LOWWORD 69
1848
1849 #define FPGAPAR_CMP4_UPPERLEV_HIGHWORD 70
1850
1851 #define FPGAPAR_CMP4_LOWERLEV_LOWWORD 71
1852
1853 #define FPGAPAR_CMP4_LOWERLEV_HIGHWORD 72
1854
1855 #define FPGAPAR_Reserve72 73
1856
1857 #define FPGAPAR_SSI1CLKREG 74
1858
1859 #define FPGAPAR_SSI1DELMODEREG 75
1860
1861 #define FPGAPAR_SSI2CLKREG 76
1862
1863 #define FPGAPAR_SSI2DELMODEREG 77
1864
1865 #define FPGAPAR_SSI3CLKREG 78
1866
1867 #define FPGAPAR_SSI3DELMODEREG 79
1868
1869 #define FPGAPAR_Reserve79 80
1870
1871 #define FPGAPAR_DDS1INPUTSELREG 81
1872
1873 #define FPGAPAR_DDS1ZREG0 82
1874
1875 #define FPGAPAR_DDS1ZREG1 83
1876
1877 #define FPGAPAR_DDS1NREG0 84
1878
1879 #define FPGAPAR_DDS1NREG1 85
1880
1881 #define FPGAPAR_DDS1_Z_PULSE_RATIO 86
1882
1883 #define FPGAPAR_DDS2INPUTSELREG 87
1884
1885 #define FPGAPAR_DDS2ZREG0 88
1886
1887 #define FPGAPAR_DDS2ZREG1 89
1888
1889 #define FPGAPAR_DDS2NREG0 90
1890
1891 #define FPGAPAR_DDS2NREG1 91
1892
1893 #define FPGAPAR_DDS2_Z_PULSE_RATIO 92
1894
1895 #define FPGAPAR_Reserve92 93
1896
1897 #define FPGAPAR_PULSE_CNFGREG 94
1898
1899 #define FPGAPAR_PULSE_DELAYREG 95
1900
1901 #define FPGAPAR_PULSE_LENGTHREG 96
1902
1903 #define FPGAPAR_Reserve96 97
1904
1905 #define FPGAPAR_DIN_POLREG 98
1906
1907 #define FPGAPAR_DIN1_4_FILTCNFG 99
1908
1909 #define FPGAPAR_DIN5_8_FILTCNFG 100
1910
1911 #define FPGAPAR_DIN9_12_FILTCNFG 101
1912
1913 #define FPGAPAR_DIN13_15_FILTCNFG 102
1914
1915 #define FPGAPAR_DOUT9_16CNFGREG 103
1916
1917 #define FPGAPAR_DOUT1_2CNFGREG 104
1918
1919 #define FPGAPAR_DOUT3_4CNFGREG 105
1920
1921 #define FPGAPAR_RS232_CNFGREG 106
1922
1923 #define FPGAPAR_ENC4PORTMODEREG 107
1924
1925 #define FPGAPAR_ENC5PORTMODEREG 108
1926
1927 #define FPGAPAR_ENC6PORTMODEREG 109
1928
1929 #define FPGAPAR_Reserve109 110
1930
1931 #define FPGAPAR_Reserve110 111
1932
1933 #define FPGAPAR_Reserve111 112
1934
1935 #define FPGAPAR_REFVEC_0_15_F2DIRQMASK 113
1936
1937 #define FPGAPAR_REFVEC16_31_F2DIRQMASK 114
1938
1939 #define FPGAPAR_REFVEC32_47_F2DIRQMASK 115
1940
1941 #define FPGAPAR_REFVEC48_63_F2DIRQMASK 116
1942
1943 #define FPGAPAR_REFVEC_0_15_SOCIRQMASK 117
1944
1945 #define FPGAPAR_REFVEC16_31_SOCIRQMASK 118
1946
1947 #define FPGAPAR_REFVEC32_47_SOCIRQMASK 119
1948
1949 #define FPGAPAR_REFVEC48_63_SOCIRQMASK 120
1950
1951 #define FPGAPAR_REFVEC_0_15_MODEREG 121
1952
1953 #define FPGAPAR_REFVEC16_31_MODEREG 122
1954
1955 #define FPGAPAR_REFVEC32_47_MODEREG 123
1956
1957 #define FPGAPAR_REFVEC48_63_MODEREG 124
1958
1959 #define FPGAPAR_REFVEC_0_15_SLOPEREG 125
1960
1961 #define FPGAPAR_REFVEC16_31_SLOPEREG 126
1962
1963 #define FPGAPAR_REFVEC32_47_SLOPEREG 127
1964
1965 #define FPGAPAR_REFVEC48_63_SLOPEREG 128
1966
1967
1968 //=================================================================================================================
1969 // 0x2218 FPGA_USRREG - Address for the page number
1970 //=================================================================================================================
1974 #define SDOINDEX_FPGA_USRREG 0x2218
1975
1979 #define FPGA_USRREG_INDEX(parno) ((0x01000000 | (SDOINDEX_FPGA_USRREG<<8)) | ((long) (parno)))
1980
1984 #define FPGA_USRREG_SRCINDEX(parno) ((SDOINDEX_FPGA_USRREG<<8) | ((long) (parno)))
1985
1989 #define FPGA_USRREG(parno) Sysvar[FPGA_USRREG_INDEX(parno)]
1990
1993 #define FPGA_USRREG_MAX 2
1994
1995 //=================================================================================================================
1996 // 0x2220 SDUPDATE - SD-Card Update Info Object
1997 //=================================================================================================================
2001 #define SDOINDEX_SDUPDATE 0x2220
2002
2006 #define SDUPDATE_INDEX(parno) ((0x01000000 | (SDOINDEX_SDUPDATE<<8)) | ((long) (parno)))
2007
2011 #define SDUPDATE_SRCINDEX(parno) ((SDOINDEX_SDUPDATE<<8) | ((long) (parno)))
2012
2016 #define SDUPDATE(parno) Sysvar[SDUPDATE_INDEX(parno)]
2017
2020 #define SDUPDATE_MAX 21
2021
2033 #define SDUPDATE_COMMAND_1 1
2034
2046 #define SDUPDATE_COMMAND_2 2
2047
2059 #define SDUPDATE_COMMAND_3 3
2060
2072 #define SDUPDATE_COMMAND_4 4
2073
2085 #define SDUPDATE_COMMAND_5 5
2086
2098 #define SDUPDATE_COMMAND_6 6
2099
2111 #define SDUPDATE_COMMAND_7 7
2112
2124 #define SDUPDATE_COMMAND_8 8
2125
2137 #define SDUPDATE_COMMAND_9 9
2138
2150 #define SDUPDATE_COMMAND_10 10
2151
2163 #define SDUPDATE_COMMAND_11 11
2164
2176 #define SDUPDATE_COMMAND_12 12
2177
2189 #define SDUPDATE_COMMAND_13 13
2190
2202 #define SDUPDATE_COMMAND_14 14
2203
2215 #define SDUPDATE_COMMAND_15 15
2216
2228 #define SDUPDATE_COMMAND_16 16
2229
2245 #define SDUPDATE_STATE_FLAGS 17
2246
2252 #define SDUPDATE_COMMANDS_SKIPPED 18
2253
2259 #define SDUPDATE_COMMANDS_COMPLETED 19
2260
2266 #define SDUPDATE_COMMANDS_FAILED 20
2267
2268
2269 //=================================================================================================================
2270 // 0x2300 AXE_PARAM - Axis Parameters
2271 //=================================================================================================================
2275 #define SDOINDEX_AXE_PARAM 0x2300
2276
2281 #define AXE_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_AXE_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
2282
2287 #define AXE_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_AXE_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
2288
2293 #define AXE_PARAM(modno,parno) Sysvar[AXE_PARAM_INDEX((modno),(parno))]
2294
2297 #define AXE_PARAM_MAX 141
2298
2308 #define VELMAX 2
2309
2320 #define HOME_FORCE 4
2321
2331 #define NEGLIMIT 5
2332
2342 #define POSLIMIT 6
2343
2353 #define SYNCMMAXCORR 7
2354
2361 #define HOME_VEL 8
2362
2373 #define TESTWIN 9
2374
2384 #define VELMAXQC 10
2385
2395 #define ACCMAXQC 11
2396
2404 #define KPROP 12
2405
2413 #define KDER 13
2414
2422 #define KINT 14
2423
2433 #define TIMER 15
2434
2444 #define POSERR 16
2445
2457 #define SYNCOFFTIME 17
2458
2466 #define SYNCMFPAR 18
2467
2476 #define SYNCMFTIME 19
2477
2487 #define SWNEGLIMACT 20
2488
2498 #define SWPOSLIMACT 21
2499
2507 #define KILIM 22
2508
2517 #define VELRES 23
2518
2528 #define POSFACT_Z 24
2529
2539 #define TESTTIM 25
2540
2550 #define TESTVAL 26
2551
2561 #define POSFACT_N 27
2562
2570 #define POSDRCT 29
2571
2581 #define PROFTIME 30
2582
2590 #define MENCODER 31
2591
2601 #define RAMPMIN 32
2602
2610 #define RAMPTYPE 33
2611
2618 #define DFLTVEL 34
2619
2626 #define DFLTACC 35
2627
2635 #define BANDWIDTH 36
2636
2644 #define FFVEL 37
2645
2655 #define REGWMAX 39
2656
2666 #define REGWMIN 40
2667
2673 #define HOME_TYPE 41
2674
2681 #define HOME_RAMP 42
2682
2693 #define HOME_OFFSET 43
2694
2702 #define ERRCOND 44
2703
2712 #define I_REFSWITCH 46
2713
2722 #define I_POSLIMITSW 47
2723
2732 #define I_NEGLIMITSW 48
2733
2742 #define O_BRAKE 49
2743
2751 #define SYNCFACTM 50
2752
2758 #define SYNCFACTS 51
2759
2772 #define SYNCTYPE 52
2773
2781 #define SYNCMARKM 53
2782
2790 #define SYNCMARKS 54
2791
2799 #define SYNCPOSOFFS 55
2800
2811 #define SYNCACCURACY 56
2812
2821 #define SYNCREADY 57
2822
2831 #define SYNCFAULT 58
2832
2841 #define SYNCMPULSM 59
2842
2853 #define SYNCMPULSS 60
2854
2862 #define SYNCMSTART 63
2863
2872 #define O_AXMOVE 65
2873
2884 #define SYNCVFTIME 66
2885
2895 #define SYNCVELREL 67
2896
2905 #define SYNCMWINM 69
2906
2915 #define SYNCMWINS 70
2916
2925 #define ESCCOND 71
2926
2936 #define JERKMIN 99
2937
2947 #define JERKMIN2 101
2948
2958 #define JERKMIN3 102
2959
2969 #define JERKMIN4 103
2970
2983 #define KILIMTIME 106
2984
2998 #define POSERRTIME 112
2999
3011 #define FEEDDIST 113
3012
3022 #define FEEDREV 114
3023
3035 #define POSENCQC 115
3036
3045 #define POSENCREV 116
3046
3053 #define HOMEZEROVEL 117
3054
3063 #define PISRC_SVIRTCOUNT 131
3064
3073 #define PISRC_MVIRTCOUNT 132
3074
3083 #define PISRC_SVIRTLATCH 133
3084
3093 #define PISRC_MVIRTLATCH 134
3094
3102 #define KFFACC 135
3103
3111 #define KFFDEC 136
3112
3122 #define I_POSLIMITSWACT 137
3123
3133 #define I_NEGLIMITSWACT 138
3134
3143 #define HOME_CURTHRESHOLD 139
3144
3152 #define PIDOPTIONS 140
3153
3154
3155 // Values for RAMPTYPE:
3156 #define RAMPTYPE_TRAPEZ 0
3157 #define RAMPTYPE_JERKLIMITED 2
3158
3159 // Values for PIDOPTIONS:
3160 #define PID_OPTINTSUMCLEAR_ARRIVAL 0x0001 // Integral sum is cleared on target arrival
3161 #define PID_OPTINTSUMCLEAR_ZEROTRACKERR 0x0002 // Integral sum is cleared once after arrival, when trackerr is 0
3162
3163 //=================================================================================================================
3164 // 0x2500 AXE_PROCESS - Axis Process Data
3165 //=================================================================================================================
3169 #define SDOINDEX_AXE_PROCESS 0x2500
3170
3175 #define AXE_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_AXE_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
3176
3181 #define AXE_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_AXE_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
3182
3187 #define AXE_PROCESS(modno,parno) Sysvar[AXE_PROCESS_INDEX((modno),(parno))]
3188
3191 #define AXE_PROCESS_MAX 236
3192
3199 #define REG_ACTPOS 1
3200
3207 #define REG_COMPOS 2
3208
3215 #define REG_ZERO 3
3216
3223 #define REG_AVEL 4
3224
3231 #define REG_MAVEL 5
3232
3239 #define REG_TRACKERR 6
3240
3249 #define REG_VELSMPT 9
3250
3257 #define REG_MAPOS 10
3258
3265 #define REG_MIPOS 11
3266
3273 #define REG_IAVEL 12
3274
3281 #define REG_IMAVEL 13
3282
3290 #define REG_REFERENCE 16
3291
3298 #define REG_TIMER 18
3299
3304 #define REG_PROFTIMER 19
3305
3311 #define REG_REVERSE 20
3312
3317 #define REG_REVDOUT 21
3318
3324 #define REG_SOVERFLOW 22
3325
3331 #define REG_MOVERFLOW 23
3332
3339 #define REG_USERREFVEL 27
3340
3341 #define REG_VAPOS 28
3342
3348 #define REG_NORMTRACKERR 29
3349
3350 #define REG_SENCINDXF 30
3351
3352 #define REG_MENCINDXF 31
3353
3354 #define REG_CNTRLSOURCE 32
3355
3363 #define REG_ENCAVEL 33
3364
3365 #define REG_ENCLEAP 34
3366
3367 #define REG_MENCLEAP 35
3368
3369 #define REG_CNTRLWORD 36
3370
3371 #define REG_PIDFLAG 37
3372
3373 #define REG_SM_COMMAND 38
3374
3375 #define REG_SM_STATE 39
3376
3382 #define REG_USERREFPOS 40
3383
3387 #define REG_SVIRTCOUNT 41
3388
3392 #define REG_MVIRTCOUNT 42
3393
3397 #define REG_HOMINGSTATE 43
3398
3402 #define REG_SVIRTLATCH 44
3403
3407 #define REG_MVIRTLATCH 45
3408
3414 #define REG_USERREFCUR 46
3415
3421 #define PID_ACTINTSUM 49
3422
3427 #define PID_INTLIMIT 50
3428
3434 #define PID_100PERCENT 51
3435
3442 #define PID_VELRESVAL 52
3443
3447 #define PID_PIDPART 53
3448
3452 #define PID_FFPART 54
3453
3454 #define PID_FFACCPART 55
3455
3460 #define PID_ACT_INTLIMIT 56
3461
3465 #define PID_FF_FACTOR 57
3466
3471 #define PID_FF_CMDVEL 58
3472
3478 #define PID_MODE 59
3479
3485 #define PFG_DIR 82
3486
3494 #define PFG_AACC 83
3495
3503 #define PFG_ADEC 84
3504
3511 #define PFG_VFIN 85
3512
3521 #define PFG_AACT 86
3522
3529 #define PFG_AACC_DELTA 87
3530
3537 #define PFG_ADELTCALC 88
3538
3545 #define PFG_PATHCALC 89
3546
3553 #define PFG_PCMD 90
3554
3563 #define PFG_VCMD 91
3564
3571 #define PFG_PCORR 92
3572
3579 #define PFG_OLDMFILTVEL 93
3580
3587 #define PFG_OLDSFILTVEL 94
3588
3595 #define PFG_MFILTERR 95
3596
3601 #define PFG_MDIR 96
3602
3607 #define PFG_MACTDIR 97
3608
3613 #define PFG_SACTDIR 98
3614
3622 #define PFG_MPCMD 99
3623
3630 #define PFG_MPCMDOLD 100
3631
3639 #define PFG_REVERSING 101
3640
3645 #define PFG_MMARKCNT 102
3646
3651 #define PFG_SMARKCNT 103
3652
3658 #define PFG_MOLDZERO 104
3659
3665 #define PFG_SOLDZERO 105
3666
3673 #define PFG_MZEROCMD 106
3674
3681 #define PFG_SZEROCMD 107
3682
3690 #define PFG_MHIT 108
3691
3699 #define PFG_SHIT 109
3700
3705 #define PFG_READYCNT 110
3706
3711 #define PFG_FAULTCNT 111
3712
3719 #define PFG_MPCMDERR 112
3720
3725 #define PFG_MARKERDIFF 113
3726
3735 #define PFG_SYNCSTART 114
3736
3741 #define PFG_OLDSYPOFFS 115
3742
3748 #define PFG_KORREKTUR 116
3749
3754 #define PFG_KORRREST 117
3755
3762 #define PFG_KORRVAL 118
3763
3771 #define PFG_MARKERFAKED 119
3772
3779 #define PFG_INTOFFSET 120
3780
3786 #define PFG_SCALESHIFT 121
3787
3791 #define PFG_AKTSTATE 122
3792
3821 #define PFG_FLAGS 123
3822
3830 #define PFG_STOPLEN 124
3831
3838 #define PFG_CINDEX 125
3839
3849 #define PFG_CVINDEX 126
3850
3857 #define PFG_CMAXINDEX 127
3858
3866 #define PFG_SYNCSTOPLEN 128
3867
3872 #define PFG_CWRAP 130
3873
3880 #define PFG_CSSTART 131
3881
3886 #define PFG_CCOUNTER 132
3887
3894 #define PFG_CCURVEPOS 133
3895
3902 #define PFG_CSLAVECPOSQ 134
3903
3910 #define PFG_CMASTERCPOS 135
3911
3918 #define PFG_GETCMDVEL 136
3919
3924 #define PFG_MMFAKEDCNT 137
3925
3930 #define PFG_SMFAKEDCNT 138
3931
3937 #define PFG_MMILLEGALCNT 139
3938
3944 #define PFG_SMILLEGALCNT 140
3945
3952 #define PFG_SYNCVELDIFF 141
3953
3960 #define PFG_SYNCPATHLEN 142
3961
3968 #define PFG_MMARKERDIST 143
3969
3976 #define PFG_SMARKERDIST 144
3977
3982 #define PFG_STARTKORR 145
3983
3990 #define PFG_STARTKORRREST 146
3991
3998 #define PFG_KORRFILT 147
3999
4006 #define PFG_LASTMMDIST 148
4007
4012 #define PFG_MMARKCORR 149
4013
4020 #define PFG_KORRUNFILT 150
4021
4030 #define PFG_MDISTMARK 151
4031
4040 #define PFG_SDISTMARK 152
4041
4048 #define PFG_STARTKORRVAL 153
4049
4056 #define PFG_LASTSMDIST 154
4057
4061 #define PFG_MARKERFILTER 155
4062
4067 #define PFG_KORRTAU 156
4068
4075 #define PFG_INTMMERROR 157
4076
4083 #define PFG_MMARKERR 158
4084
4091 #define PFG_ORGREALPOS 159
4092
4097 #define PFG_DYNKORRLIMIT 160
4098
4109 #define PFG_MMARKFIFOVALID 161
4110
4116 #define PFG_MMARKFIFOREAD 162
4117
4132 #define PFG_LASTERROR 163
4133
4137 #define PFG_STOUCHPOS 164
4138
4139 #define PFG_MTOUCHPOS 165
4140
4149 #define PFG_MCENDPOS 166
4150
4161 #define PFG_SMARKFIFOVALID 167
4162
4168 #define PFG_SMARKFIFOREAD 168
4169
4176 #define PFG_CMARKPOS 173
4177
4183 #define PFG_MMARKFIFOTEST 174
4184
4190 #define PFG_SMARKFIFOTEST 175
4191
4196 #define PFG_RESTOFFSDBL 176
4197
4202 #define PFG_OFFTOTALDIST 177
4203
4208 #define PFG_OFFDISTDONE 178
4209
4214 #define PFG_LASTMOVSYNC 179
4215
4236 #define PFG_JSTATE 180
4237
4244 #define PFG_VCMDSIGNED 181
4245
4255 #define PFG_JERKSTOPPATH 182
4256
4263 #define PFG_LASTMMDEVIATION 183
4264
4271 #define PFG_INTSMERROR 184
4272
4279 #define PFG_SMARKERR 185
4280
4287 #define PFG_LASTSMDEVIATION 186
4288
4295 #define PFG_MMDEVPOSDIFF 187
4296
4303 #define PFG_SMDEVPOSDIFF 188
4304
4311 #define PFG_JERKFINVEL 189
4312
4321 #define PFG_JERKSTOPDIST 190
4322
4329 #define PFG_LASTREALMZERO 191
4330
4337 #define PFG_LASTREALSZERO 192
4338
4345 #define PFG_CPOLYMAXVEL 193
4346
4353 #define PFG_CPOLYMINVEL 194
4354
4359 #define PFG_SMARKERFILTER 195
4360
4367 #define PFG_SYNCDIFFPOSL 196
4368
4374 #define PFG_CALCMCURVPOS 197
4375
4382 #define PFG_RESTOFFSET 198
4383
4390 #define PFG_OFFSETVALUE 199
4391
4399 #define PFG_MASTERTARGET 200
4400
4407 #define PFG_REVERSEOFFSET 201
4408
4416 #define PFG_MSTARTCURVESTATE 202
4417
4424 #define PFG_MSTARTCURVESTARTMPCMD 203
4425
4432 #define PFG_MSTARTCURVEMPOSSL 204
4433
4440 #define PFG_MSTARTCURVEMENDPOSSL 205
4441
4448 #define PFG_MSTARTCURVECPOSSL 206
4449
4456 #define PFG_MSTARTCURVEDELTAS 207
4457
4463 #define PFG_MSTARTCURVESMARKTODO 208
4464
4470 #define PFG_MSTARTCURVEDELTASREST 209
4471
4478 #define PFG_MSTARTCURVEERR 210
4479
4484 #define PFG_MSTARTMARKERTODO 211
4485
4492 #define PFG_SYNCAACT 212
4493
4498 #define PFG_ACTSYNCVFTIME 213
4499
4506 #define PFG_FILTERCOUNT 214
4507
4514 #define PFG_MASTERVELSQSL 215
4515
4522 #define PFG_COMMANDPOS 216
4523
4530 #define PFG_OLDCOMMANDPOS 217
4531
4538 #define PFG_CMASTERCREST 218
4539
4546 #define PFG_CSLAVECREST 219
4547
4551 #define PFG_SYNCMNEGBUFFER 220
4552
4556 #define PFG_CMASTERCLEN 221
4557
4561 #define PFG_CALCCURVEPOS 222
4562
4577 #define PFG_VCMDSIGNED_USERSCALED 223
4578
4583 #define PFG_PROFTIMER 224
4584
4585 #define PFG_CCALCULATE 225
4586
4587 #define PFG_OFFSET_TIME 226
4588
4589 #define PFG_OFFSET_VFIN 227
4590
4591 #define PFG_OFFSET_ACC 228
4592
4593 #define PFG_OFFSET_CORR 229
4594
4598 #define PFG_FINPOS 230
4599
4608 #define PFG_COMPOSDIFF 231
4609
4614 #define PFG_CSTARTCLEN 232
4615
4622 #define PFG_ACMD 233
4623
4631 #define PFG_USERCMDPOS 234
4632
4637 #define PFG_RUNTIME_ERR 235
4638
4639
4640 // Values for PFG_AKTSTATE:
4641 #define PGS_POSCTRL 0 // Position control, no calculations
4642 #define PGS_TPZPREDEC 1 // Deceleration before start of acceleration
4643 #define PGS_TPZACC 2 // Trapezoidal acceleration
4644 #define PGS_TPZDEC 3 // Trapezoidal deceleration
4645 #define PGS_TPZVEL 4 // Trapezoidal constant velocity
4646 #define PGS_CVEL 5 // Continuous velocity
4647 #define PGS_CACC 6 // Continuous acceleration
4648 #define PGS_CPREDEC 7 // Continuous deceleration before acceleration
4649 #define PGS_CDEC 8 // Continuous deceleration
4650 #define PGS_VSYNC 12 // Velocity synchronization
4651 #define PGS_PSYNC 13 // Position synchronization
4652 #define PGS_PSYNCM 14 // Position synchronization with marker
4653 #define PGS_FLOAT 15 // Floating, no regulation
4654 #define PGS_POSFLOAT 16 // Not used anymore
4655 #define PGS_CSYIDLE 17 // Idle while in curve sync mode
4656 #define PGS_CSYSTARTING 18 // Start procedure for curve sync
4657 #define PGS_CSYSTOPPING 19 // Stop procedure for curve sync
4658 #define PGS_CSYRUNNING 20 // Curve synchronization is running
4659 #define PGS_LMTJERK 21 // Running in limited jerk mode (for detail look at PFG_G_JSTATE)
4660 #define PGS_FLOATUSER 22 // Floating, command position is taken from user
4661 #define PGS_PATHMOVE 23 // Path synchronization: Following PATHMOVE curve
4662 #define PGS_PATHSTART 24 // Path synchronization: Following start path
4663 #define PGS_PATHSYNC 25 // Path synchronization: Following main path
4664 #define PGS_PATHWAIT 26 // Path synchronization: Stopped and waiting to continue
4665 #define PGS_PATHIDLE 27 // Path synchronization: Stopped and idle
4666
4667 //=================================================================================================================
4668 // 0x2600 MACHINE_PARAM -
4669 //=================================================================================================================
4673 #define SDOINDEX_MACHINE_PARAM 0x2600
4674
4679 #define MACHINE_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_MACHINE_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
4680
4685 #define MACHINE_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_MACHINE_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
4686
4691 #define MACHINE_PARAM(modno,parno) Sysvar[MACHINE_PARAM_INDEX((modno),(parno))]
4692
4695 #define MACHINE_PARAM_MAX 31
4696
4697 #define MACHINE_PARAM_MAX_SUBINDEX 0
4698
4699 #define MACHINE_MODE 1
4700
4701 #define MACHINE_PISRC_VIRTCOUNT 10
4702
4703 #define MACHINE_PISRC_VIRTLATCH 11
4704
4710 #define KIN_SYNC_TYPE 21
4711
4717 #define KIN_SYNC_STARTFLAG 22
4718
4724 #define KIN_SYNC_STOPFLAG 23
4725
4731 #define KIN_SYNC_VECX 24
4732
4738 #define KIN_SYNC_VECY 25
4739
4745 #define KIN_SYNC_VECZ 26
4746
4752 #define KIN_SYNC_ROTCX 27
4753
4759 #define KIN_SYNC_ROTCY 28
4760
4766 #define KIN_SYNC_ROTCZ 29
4767
4773 #define KIN_SYNC_FPSCALE 30
4774
4775
4776 // Values for MACHINE_MODE:
4777 #define MACHINE_MODE_DISABLED 0
4778 #define MACHINE_MODE_ENABLED 1
4779
4780 //=================================================================================================================
4781 // 0x2640 MACHINE_PROCESS -
4782 //=================================================================================================================
4786 #define SDOINDEX_MACHINE_PROCESS 0x2640
4787
4792 #define MACHINE_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_MACHINE_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
4793
4798 #define MACHINE_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_MACHINE_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
4799
4804 #define MACHINE_PROCESS(modno,parno) Sysvar[MACHINE_PROCESS_INDEX((modno),(parno))]
4805
4808 #define MACHINE_PROCESS_MAX 11
4809
4810 #define MACHINE_PROCESS_MAX_SUBINDEX 0
4811
4812 #define MACHINE_ERROR_FLAG 1
4813
4817 #define KIN_SYNC_ACTIVE 3
4818
4819 #define MACHINE_ACTPOS 4
4820
4821 #define MACHINE_ACTVEL 5
4822
4823 #define MACHINE_CPOS_MACHCOORD_X 6
4824
4825 #define MACHINE_CPOS_MACHCOORD_Y 7
4826
4827 #define MACHINE_CPOS_MACHCOORD_Z 8
4828
4834 #define MACHINE_ACT_PATH_DISTANCE 9
4835
4841 #define MACHINE_ACT_PATH_VELOCITY 10
4842
4843
4844 //=================================================================================================================
4845 // 0x2800 VIRTMAST_PARAM - Virtual Master Parameters
4846 //=================================================================================================================
4850 #define SDOINDEX_VIRTMAST_PARAM 0x2800
4851
4856 #define VIRTMAST_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_VIRTMAST_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
4857
4862 #define VIRTMAST_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_VIRTMAST_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
4863
4868 #define VIRTMAST_PARAM(modno,parno) Sysvar[VIRTMAST_PARAM_INDEX((modno),(parno))]
4869
4872 #define VIRTMAST_PARAM_MAX 36
4873
4879 #define VIRTMAST_MODE 1
4880
4890 #define VIRTMAST_PISRC_CMDWORD 10
4891
4902 #define VIRTMAST_PISRC_CMDVEL 11
4903
4913 #define VIRTMAST_VEL 30
4914
4924 #define VIRTMAST_ACC 31
4925
4935 #define VIRTMAST_DEC 32
4936
4944 #define VIRTMAST_UUFACT_UNITNO 34
4945
4953 #define VIRTMAST_UUFACT_INCNO 35
4954
4955
4956 // Values for VIRTMAST_MODE:
4957 #define VIRTMAST_MODE_DISABLED 0 // Disabled, output velocity is zero.
4958 #define VIRTMAST_MODE_VELOCITY 1 // Velocity mode, PO_VIRTMAST_VEL is taken directly from VIRTMAST_PISRC_CMDVEL, and scaled using VIRTMAST_UUFACT_INCNO and VIRTMAST_UUFACT_UNITNO.
4959 #define VIRTMAST_MODE_PROFILE 3 // Velocity profile mode, PO_VIRTMAST_VEL is generated using VIRTMAST_VEL/ACC/DEC.
4960
4961 //=================================================================================================================
4962 // 0x2840 VIRTCOUNTIN_PARAM - Virtual Counter Inputs parameters
4963 //=================================================================================================================
4967 #define SDOINDEX_VIRTCOUNTIN_PARAM 0x2840
4968
4973 #define VIRTCOUNTIN_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_VIRTCOUNTIN_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
4974
4979 #define VIRTCOUNTIN_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_VIRTCOUNTIN_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
4980
4985 #define VIRTCOUNTIN_PARAM(modno,parno) Sysvar[VIRTCOUNTIN_PARAM_INDEX((modno),(parno))]
4986
4989 #define VIRTCOUNTIN_PARAM_MAX 37
4990
5003 #define VIRTCNTIN_MODE 1
5004
5013 #define VIRTCNTIN_SIMULATION_SPEED 4
5014
5023 #define VIRTCNTIN_INHIBIT 5
5024
5030 #define VIRTCNTIN_PISRC_COUNTER 10
5031
5038 #define VIRTCNTIN_MAXSTEP 30
5039
5049 #define VIRTCNTIN_OVFL_VALUE 32
5050
5058 #define VIRTCNTIN_OVFL_FORCE 33
5059
5067 #define VIRTCNTIN_UUFACT_UNITNO 34
5068
5074 #define VIRTCNTIN_UUFACT_INCNO 35
5075
5076 #define VIRTCNTIN_MOVING_AVERAGE_N 36
5077
5078
5079 // Values for VIRTCNTIN_MODE:
5080 #define VIRTCNTIN_MODE_ABSOLUTE 0 // Source is a position value and difference to last value is added (incremental encoders)
5081 #define VIRTCNTIN_MODE_DELTA 1 // Source is a velocity value and it is added as is
5082 #define VIRTCNTIN_MODE_SIMULATION_SLAVE 2 // Source is taken as it is - e.g. COMPOS from an axis
5083 #define VIRTCNTIN_MODE_ABSOLUTE_DIRECT 3 // Source is absolute and is directly taken as output position (absolute encoders)
5084 #define VIRTCNTIN_MODE_ABSOLUTE_16BIT 4 // Source is 16bit position counter, difference to last value is added to current position
5085 #define VIRTCNTIN_MODE_ABSOLUTE_DIRECT_ENDLESS 5 // Source is absolute. Output position will not overflow at encoder overflow (absolute encoders).
5086
5087 //=================================================================================================================
5088 // 0x2880 VIRTLATCH_PARAM - Virtual Latch Inputs Parameters
5089 //=================================================================================================================
5093 #define SDOINDEX_VIRTLATCH_PARAM 0x2880
5094
5099 #define VIRTLATCH_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_VIRTLATCH_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
5100
5105 #define VIRTLATCH_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_VIRTLATCH_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
5106
5111 #define VIRTLATCH_PARAM(modno,parno) Sysvar[VIRTLATCH_PARAM_INDEX((modno),(parno))]
5112
5115 #define VIRTLATCH_PARAM_MAX 37
5116
5122 #define VIRTLATCH_MODE 1
5123
5130 #define VIRTLATCH_SIM_ZDIST 4
5131
5138 #define VIRTLATCH_LATCHVALID_BITMASK 5
5139
5147 #define VIRTLATCH_PISRC_COUNTER 10
5148
5156 #define VIRTLATCH_PISRC_LATCHCNT 11
5157
5165 #define VIRTLATCH_PISRC_LATCH 12
5166
5175 #define VIRTLATCH_PISRC_LATCHSTAT 13
5176
5183 #define VIRTLATCH_PISRC_LATCHVALID 14
5184
5192 #define VIRTLATCH_PISRC_LATCHFIFO_AMOUNT 15
5193
5201 #define VIRTLATCH_PISRC_LATCHFIFO_READ 16
5202
5209 #define VIRTLATCH_CNTW_CLEAR 30
5210
5217 #define VIRTLATCH_CNTW_ACTIVE 31
5218
5225 #define VIRTLATCH_STAT_HIT 33
5226
5232 #define VIRTLATCH_OFFSET 34
5233
5239 #define VIRTLATCH_UUFACT_UNITNO 35
5240
5246 #define VIRTLATCH_UUFACT_INCNO 36
5247
5248
5249 // Values for VIRTLATCH_MODE:
5250 #define VIRTLATCH_MODE_HARDWARE 0 // Standard mode with HW Latch modules.
5251 #define VIRTLATCH_MODE_SOFTWARE 1 // Latching is done in software (latency up to 1ms), using VIRTLATCH_PISRC_LATCHVALID and VIRTLATCH_LATCHVALID_BITMASK.
5252 #define VIRTLATCH_MODE_SIMULATOR 2 // Used for simulated latches. The value from VIRTLATCH_PISRC_COUNTER will be compared to the current PO_VIRTLATCH_VALUE. If the distance is bigger than VIRTLATCH_SIM_ZDIST, a new latch will be generated at PO_VIRTLATCH_VALUE + VIRTLATCH_SIM_ZDIST.
5253 #define VIRTLATCH_MODE_16BIT 3 // See Mode 0, but source is a 16bit value.
5254 #define VIRTLATCH_MODE_DIRECT 4 // If the value from VIRTLATCH_PISRC_LATCHVALID ANDed with VIRTLATCH_VALID_BITMASK result != 0, the value from VIRTLATCH_PISRC_COUNTER will be written directly in PO_VIRTLATCH_VALUE. Can be used for bus drives.
5255
5256 //=================================================================================================================
5257 // 0x28C0 VIRTAMP_PARAM - Virtual Amplifier Parameters
5258 //=================================================================================================================
5262 #define SDOINDEX_VIRTAMP_PARAM 0x28C0
5263
5268 #define VIRTAMP_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_VIRTAMP_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
5269
5274 #define VIRTAMP_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_VIRTAMP_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
5275
5280 #define VIRTAMP_PARAM(modno,parno) Sysvar[VIRTAMP_PARAM_INDEX((modno),(parno))]
5281
5284 #define VIRTAMP_PARAM_MAX 54
5285
5293 #define VIRTAMP_MODE 1
5294
5300 #define VIRTAMP_PISRC_CMDWORD 10
5301
5307 #define VIRTAMP_PISRC_REFPOS 11
5308
5314 #define VIRTAMP_PISRC_REFVEL 12
5315
5321 #define VIRTAMP_PISRC_REFACC 13
5322
5328 #define VIRTAMP_PISRC_CURRENT 20
5329
5335 #define VIRTAMP_PISRC_STATUS 21
5336
5345 #define VIRTAMP_DRIVETYPE 30
5346
5355 #define VIRTAMP_CNTRLW_PWROFF 31
5356
5365 #define VIRTAMP_CNTRLW_PWRONDIS 32
5366
5375 #define VIRTAMP_CNTRLW_PWRONENP 33
5376
5385 #define VIRTAMP_CNTRLW_PWRONENN 34
5386
5395 #define VIRTAMP_CNTRLW_QUICKSTOP 35
5396
5405 #define VIRTAMP_CNTRLW_RESET 36
5406
5414 #define VIRTAMP_REFTYPE 37
5415
5425 #define VIRTAMP_REFOUTP 38
5426
5435 #define VIRTAMP_REFOUTN 39
5436
5442 #define VIRTAMP_REF100PERC 40
5443
5449 #define VIRTAMP_REFLIMIT 41
5450
5456 #define VIRTAMP_REFOFFSET 42
5457
5467 #define VIRTAMP_INVERT 43
5468
5479 #define VIRTAMP_I2TTIME 44
5480
5491 #define VIRTAMP_STOPDELAY 45
5492
5502 #define VIRTAMP_REVERSE 46
5503
5510 #define VIRTAMP_ERROR_BITMASK 47
5511
5521 #define VIRTAMP_ERROR_POLARITY 48
5522
5533 #define VIRTAMP_I2TLIMIT 49
5534
5546 #define VIRTAMP_REFACC100PERC 50
5547
5555 #define VIRTAMP_READY_BITMASK 51
5556
5565 #define VIRTAMP_READY_POLARITY 52
5566
5576 #define VIRTAMP_TORQUE_CONST 53
5577
5578
5579 // Values for VIRTAMP_MODE:
5580 #define VIRTAMP_MODE_DISABLE 0 // Disabled
5581 #define VIRTAMP_MODE_ENABLE 1 // Enabled
5582
5583 //=================================================================================================================
5584 // 0x2900 VIRTDIGIN_PARAM - Virtual Digital Input Parameters
5585 //=================================================================================================================
5589 #define SDOINDEX_VIRTDIGIN_PARAM 0x2900
5590
5595 #define VIRTDIGIN_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_VIRTDIGIN_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
5596
5601 #define VIRTDIGIN_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_VIRTDIGIN_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
5602
5607 #define VIRTDIGIN_PARAM(modno,parno) Sysvar[VIRTDIGIN_PARAM_INDEX((modno),(parno))]
5608
5611 #define VIRTDIGIN_PARAM_MAX 14
5612
5622 #define VIRTDIGIN_PISRC_MAP1 10
5623
5629 #define VIRTDIGIN_PISRC_MAP2 11
5630
5636 #define VIRTDIGIN_PISRC_MAP3 12
5637
5643 #define VIRTDIGIN_PISRC_MAP4 13
5644
5645
5646 //=================================================================================================================
5647 // 0x2940 VIRTDIGOUT_PARAM - Virtual Digital Output Parameters
5648 //=================================================================================================================
5652 #define SDOINDEX_VIRTDIGOUT_PARAM 0x2940
5653
5658 #define VIRTDIGOUT_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_VIRTDIGOUT_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
5659
5664 #define VIRTDIGOUT_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_VIRTDIGOUT_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
5665
5670 #define VIRTDIGOUT_PARAM(modno,parno) Sysvar[VIRTDIGOUT_PARAM_INDEX((modno),(parno))]
5671
5674 #define VIRTDIGOUT_PARAM_MAX 2
5675
5676 //=================================================================================================================
5677 // 0x2980 VIRTANIN_PARAM - Virtual Analog Input Parameters
5678 //=================================================================================================================
5682 #define SDOINDEX_VIRTANIN_PARAM 0x2980
5683
5688 #define VIRTANIN_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_VIRTANIN_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
5689
5694 #define VIRTANIN_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_VIRTANIN_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
5695
5700 #define VIRTANIN_PARAM(modno,parno) Sysvar[VIRTANIN_PARAM_INDEX((modno),(parno))]
5701
5704 #define VIRTANIN_PARAM_MAX 33
5705
5712 #define VIRTANIN_PISRC_VALUE 10
5713
5720 #define VIRTANIN_UUFACT_UNITNO 30
5721
5728 #define VIRTANIN_UUFACT_DIGNO 31
5729
5736 #define VIRTANIN_DIG_OFFSET 32
5737
5738
5739 //=================================================================================================================
5740 // 0x29C0 VIRTANOUT_PARAM - Virtual Analog Output Parameters
5741 //=================================================================================================================
5745 #define SDOINDEX_VIRTANOUT_PARAM 0x29C0
5746
5751 #define VIRTANOUT_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_VIRTANOUT_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
5752
5757 #define VIRTANOUT_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_VIRTANOUT_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
5758
5763 #define VIRTANOUT_PARAM(modno,parno) Sysvar[VIRTANOUT_PARAM_INDEX((modno),(parno))]
5764
5767 #define VIRTANOUT_PARAM_MAX 2
5768
5769 //=================================================================================================================
5770 // 0x2A00 VIRTCUSTOM_PARAM - Virtual Customer Module Parameters
5771 //=================================================================================================================
5775 #define SDOINDEX_VIRTCUSTOM_PARAM 0x2A00
5776
5781 #define VIRTCUSTOM_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_VIRTCUSTOM_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
5782
5787 #define VIRTCUSTOM_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_VIRTCUSTOM_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
5788
5793 #define VIRTCUSTOM_PARAM(modno,parno) Sysvar[VIRTCUSTOM_PARAM_INDEX((modno),(parno))]
5794
5797 #define VIRTCUSTOM_PARAM_MAX 20
5798
5804 #define VIRTCUSTOM_PAR_1 1
5805
5811 #define VIRTCUSTOM_PAR_2 2
5812
5818 #define VIRTCUSTOM_PAR_3 3
5819
5825 #define VIRTCUSTOM_PAR_4 4
5826
5832 #define VIRTCUSTOM_PAR_5 5
5833
5839 #define VIRTCUSTOM_PAR_6 6
5840
5846 #define VIRTCUSTOM_PAR_7 7
5847
5853 #define VIRTCUSTOM_PAR_8 8
5854
5860 #define VIRTCUSTOM_PAR_9 9
5861
5867 #define VIRTCUSTOM_PISRC_1 10
5868
5874 #define VIRTCUSTOM_PISRC_2 11
5875
5881 #define VIRTCUSTOM_PISRC_3 12
5882
5888 #define VIRTCUSTOM_PISRC_4 13
5889
5895 #define VIRTCUSTOM_PISRC_5 14
5896
5902 #define VIRTCUSTOM_PISRC_6 15
5903
5909 #define VIRTCUSTOM_PISRC_7 16
5910
5916 #define VIRTCUSTOM_PISRC_8 17
5917
5923 #define VIRTCUSTOM_PISRC_9 18
5924
5930 #define VIRTCUSTOM_PISRC_10 19
5931
5932
5933 //=================================================================================================================
5934 // 0x2A40 VIRTMATH_PARAM - Virtual Math Module Parameters
5935 //=================================================================================================================
5939 #define SDOINDEX_VIRTMATH_PARAM 0x2A40
5940
5945 #define VIRTMATH_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_VIRTMATH_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
5946
5951 #define VIRTMATH_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_VIRTMATH_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
5952
5957 #define VIRTMATH_PARAM(modno,parno) Sysvar[VIRTMATH_PARAM_INDEX((modno),(parno))]
5958
5961 #define VIRTMATH_PARAM_MAX 34
5962
5969 #define VIRTMATH_MODE 1
5970
5985 #define VIRTMATH_INVERT 2
5986
5992 #define VIRTMATH_LOW_LIMIT 3
5993
5999 #define VIRTMATH_HIGH_LIMIT 4
6000
6007 #define VIRTMATH_PISRC_1 10
6008
6015 #define VIRTMATH_PISRC_2 11
6016
6023 #define VIRTMATH_PISRC_3 12
6024
6031 #define VIRTMATH_PISRC_4 13
6032
6039 #define VIRTMATH_POSRC_1 20
6040
6047 #define VIRTMATH_POSRC_2 21
6048
6054 #define VIRTMATH_MODE_BASED_1 30
6055
6061 #define VIRTMATH_MODE_BASED_2 31
6062
6068 #define VIRTMATH_MODE_BASED_3 32
6069
6075 #define VIRTMATH_MODE_BASED_4 33
6076
6077
6078 // Values for VIRTMATH_MODE:
6079 #define VIRTMATH_MODE_OFF 0 // Module Disabled
6080 #define VIRTMATH_MODE_ADD 1 // Output = Input1 + Input2 + Input3 + Input4
6081 #define VIRTMATH_MODE_GAIN 2 // Output = (Input1 / Input2) * (Input3 / Input4)
6082 #define VIRTMATH_MODE_SINW 10 // Output = Input1 / Input2 * Sin(2*PI*t/Input3) + Input4
6083 #define VIRTMATH_MODE_COSW 11 // Output = Input1 / Input2 * Cos(2*PI*t/Input3) + Input4
6084 #define VIRTMATH_MODE_SIN 12 // Output = Input1 / Input2 * Sin(Input3/1000) + Input4
6085 #define VIRTMATH_MODE_COS 13 // Output = Input1 / Input2 * Cos(Input3/1000) + Input4
6086 #define VIRTMATH_MODE_LP1_FILTER 20 // Output = (Input1 - Output) / Input2 + Output
6087 #define VIRTMATH_MODE_PID 30 // Output = Pid(): Setpoint = Input1, measurement = Input2, Configuration = VIRTMATH_MODE_BASED1-4
6088
6089 // Values for VIRTMATH_MODE_BASED:
6090 #define VIRTMATH_MODE_PID_KP 30 // Mode VIRTMATH_MODE_PID: Controller gain proportional
6091 #define VIRTMATH_MODE_PID_KI 31 // Mode VIRTMATH_MODE_PID: Controller gain integral
6092 #define VIRTMATH_MODE_PID_KD 32 // Mode VIRTMATH_MODE_PID: Controller gain differential
6093 #define VIRTMATH_MODE_PID_KILIM 33 // Mode VIRTMATH_MODE_PID: Integral limit
6094
6095 //=================================================================================================================
6096 // 0x2C00 VIRTMAST_PROCESS - Virtual Master Process Data
6097 //=================================================================================================================
6101 #define SDOINDEX_VIRTMAST_PROCESS 0x2C00
6102
6107 #define VIRTMAST_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_VIRTMAST_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
6108
6113 #define VIRTMAST_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_VIRTMAST_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
6114
6119 #define VIRTMAST_PROCESS(modno,parno) Sysvar[VIRTMAST_PROCESS_INDEX((modno),(parno))]
6120
6123 #define VIRTMAST_PROCESS_MAX 7
6124
6130 #define PO_VIRTMAST_VEL 1
6131
6137 #define PO_VIRTMAST_POS 2
6138
6144 #define PO_VIRTMAST_TVEL_INC 3
6145
6151 #define PO_VIRTMAST_ACC_INC 4
6152
6158 #define PO_VIRTMAST_DEC_INC 5
6159
6163 #define PO_VIRTMAST_POS16 6
6164
6165
6166 //=================================================================================================================
6167 // 0x2C40 VIRTCOUNTIN_PROCESS - Virtual Counter Inputs Process Data
6168 //=================================================================================================================
6172 #define SDOINDEX_VIRTCOUNTIN_PROCESS 0x2C40
6173
6178 #define VIRTCOUNTIN_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_VIRTCOUNTIN_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
6179
6184 #define VIRTCOUNTIN_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_VIRTCOUNTIN_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
6185
6190 #define VIRTCOUNTIN_PROCESS(modno,parno) Sysvar[VIRTCOUNTIN_PROCESS_INDEX((modno),(parno))]
6191
6194 #define VIRTCOUNTIN_PROCESS_MAX 13
6195
6201 #define PO_VIRTCNTIN_VALUE 1
6202
6209 #define PO_VIRTCNTIN_VELOCITY 2
6210
6216 #define PO_VIRTCNTIN_FRACT 4
6217
6224 #define PO_VIRTCNTIN_OVFLS 5
6225
6232 #define PO_VIRTCNTIN_LASTSRCPOS 6
6233
6239 #define PO_VIRTCNTIN_LASTVELOCITY 7
6240
6246 #define PO_VIRTCNTIN_OVFL_AMOUNT 8
6247
6255 #define PO_VIRTCNTIN_STAT 9
6256
6261 #define PO_VIRTCNTIN_ERR_COUNT 10
6262
6263 #define PO_VIRTCNTIN_VALUE_FILTERED_FRACTIONAL 11
6264
6265 #define PO_VIRTCNTIN_VALUE_FILTERED_INTEGRAL 12
6266
6267
6268 //=================================================================================================================
6269 // 0x2C80 VIRTLATCH_PROCESS - Virtual Latch Inputs Process Data
6270 //=================================================================================================================
6274 #define SDOINDEX_VIRTLATCH_PROCESS 0x2C80
6275
6280 #define VIRTLATCH_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_VIRTLATCH_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
6281
6286 #define VIRTLATCH_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_VIRTLATCH_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
6287
6292 #define VIRTLATCH_PROCESS(modno,parno) Sysvar[VIRTLATCH_PROCESS_INDEX((modno),(parno))]
6293
6296 #define VIRTLATCH_PROCESS_MAX 16
6297
6303 #define PO_VIRTLATCH_VALUE 1
6304
6309 #define PO_VIRTLATCH_COUNTER 2
6310
6317 #define PO_VIRTLATCH_LASTSRCLATCHPOS 4
6318
6323 #define PO_VIRTLATCH_FLAG 5
6324
6329 #define PO_VIRTLATCH_CMDWORD 6
6330
6336 #define PO_VIRTLATCH_FIFO_READ 7
6337
6341 #define PO_VIRTLATCH_FIFO_VALID 8
6342
6347 #define PO_VIRTLATCH_FIFO_WRITEINDEX 9
6348
6353 #define PO_VIRTLATCH_FIFO_READINDEX 10
6354
6358 #define PO_VIRTLATCH_FIFO_LATCHAMOUNT 11
6359
6363 #define PO_VIRTLATCH_FIFO_TOTALCNT 12
6364
6369 #define PO_VIRTLATCH_FIFO_OVERFLOWCNT 13
6370
6377 #define PO_VIRTLATCH_FIFO_PEEK 14
6378
6383 #define PO_VIRTLATCH_VALID 15
6384
6385
6386 //=================================================================================================================
6387 // 0x2CC0 VIRTAMP_PROCESS - Virtual Amplifier Process Data
6388 //=================================================================================================================
6392 #define SDOINDEX_VIRTAMP_PROCESS 0x2CC0
6393
6398 #define VIRTAMP_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_VIRTAMP_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
6399
6404 #define VIRTAMP_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_VIRTAMP_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
6405
6410 #define VIRTAMP_PROCESS(modno,parno) Sysvar[VIRTAMP_PROCESS_INDEX((modno),(parno))]
6411
6414 #define VIRTAMP_PROCESS_MAX 16
6415
6420 #define PO_VIRTAMP_STATUS 1
6421
6426 #define PO_VIRTAMP_CMDWORD 2
6427
6432 #define PO_VIRTAMP_REFPOS 3
6433
6438 #define PO_VIRTAMP_REFVEL 4
6439
6445 #define PO_VIRTAMP_REFACC 5
6446
6451 #define PO_VIRTAMP_DIRPOS 7
6452
6457 #define PO_VIRTAMP_DIRNEG 8
6458
6463 #define PO_VIRTAMP_CURRENT 10
6464
6468 #define PO_VIRTAMP_ACTSTOPDELAY 12
6469
6473 #define PO_VIRTAMP_I2TVALUE 13
6474
6482 #define PO_VIRTAMP_ERROR 14
6483
6493 #define PO_VIRTAMP_REMOTE_AMP 15
6494
6495
6496 // Values for PO_VIRTAMP_ERROR:
6497 #define VIRTAMP_ERROR_HWAMP 0x0001 // HW amplifier reports error
6498 #define VIRTAMP_ERROR_I2T 0x0002 // Virtual amplifier reports I2T error
6499 #define VIRTAMP_ERROR_NOTREADY 0x0004 // HW amplifier not ready
6500
6501 //=================================================================================================================
6502 // 0x2D00 VIRTDIGIN_PROCESS - Virtual Digital Input Process Data
6503 //=================================================================================================================
6507 #define SDOINDEX_VIRTDIGIN_PROCESS 0x2D00
6508
6513 #define VIRTDIGIN_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_VIRTDIGIN_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
6514
6519 #define VIRTDIGIN_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_VIRTDIGIN_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
6520
6525 #define VIRTDIGIN_PROCESS(modno,parno) Sysvar[VIRTDIGIN_PROCESS_INDEX((modno),(parno))]
6526
6529 #define VIRTDIGIN_PROCESS_MAX 8
6530
6535 #define PO_VIRTDIGIN_VALLONG 1
6536
6541 #define PO_VIRTDIGIN_VALWORD1 2
6542
6547 #define PO_VIRTDIGIN_VALWORD2 3
6548
6553 #define PO_VIRTDIGIN_VALBYTE1 4
6554
6559 #define PO_VIRTDIGIN_VALBYTE2 5
6560
6565 #define PO_VIRTDIGIN_VALBYTE3 6
6566
6571 #define PO_VIRTDIGIN_VALBYTE4 7
6572
6573
6574 //=================================================================================================================
6575 // 0x2D40 VIRTDIGOUT_PROCESS - Virtual Digital Output Process Data
6576 //=================================================================================================================
6580 #define SDOINDEX_VIRTDIGOUT_PROCESS 0x2D40
6581
6586 #define VIRTDIGOUT_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_VIRTDIGOUT_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
6587
6592 #define VIRTDIGOUT_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_VIRTDIGOUT_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
6593
6598 #define VIRTDIGOUT_PROCESS(modno,parno) Sysvar[VIRTDIGOUT_PROCESS_INDEX((modno),(parno))]
6599
6602 #define VIRTDIGOUT_PROCESS_MAX 8
6603
6607 #define PO_VIRTDIGOUT_VALLONG 1
6608
6613 #define PO_VIRTDIGOUT_VALWORD1 2
6614
6619 #define PO_VIRTDIGOUT_VALWORD2 3
6620
6625 #define PO_VIRTDIGOUT_VALBYTE1 4
6626
6631 #define PO_VIRTDIGOUT_VALBYTE2 5
6632
6637 #define PO_VIRTDIGOUT_VALBYTE3 6
6638
6643 #define PO_VIRTDIGOUT_VALBYTE4 7
6644
6645
6646 //=================================================================================================================
6647 // 0x2D80 VIRTANIN_PROCESS - Virtual Analog Input Process Data
6648 //=================================================================================================================
6652 #define SDOINDEX_VIRTANIN_PROCESS 0x2D80
6653
6658 #define VIRTANIN_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_VIRTANIN_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
6659
6664 #define VIRTANIN_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_VIRTANIN_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
6665
6670 #define VIRTANIN_PROCESS(modno,parno) Sysvar[VIRTANIN_PROCESS_INDEX((modno),(parno))]
6671
6674 #define VIRTANIN_PROCESS_MAX 8
6675
6680 #define PO_VIRTANIN_VALUE 1
6681
6686 #define PO_VIRTANIN_MAXVAL 2
6687
6692 #define PO_VIRTANIN_MINVAL 3
6693
6699 #define PO_VIRTANIN_SUM 4
6700
6708 #define PO_VIRTANIN_COUNT 6
6709
6715 #define PO_VIRTANIN_AVG 7
6716
6717
6718 //=================================================================================================================
6719 // 0x2DC0 VIRTANOUT_PROCESS - Virtual Analog Output Process Data
6720 //=================================================================================================================
6724 #define SDOINDEX_VIRTANOUT_PROCESS 0x2DC0
6725
6730 #define VIRTANOUT_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_VIRTANOUT_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
6731
6736 #define VIRTANOUT_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_VIRTANOUT_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
6737
6742 #define VIRTANOUT_PROCESS(modno,parno) Sysvar[VIRTANOUT_PROCESS_INDEX((modno),(parno))]
6743
6746 #define VIRTANOUT_PROCESS_MAX 4
6747
6751 #define PO_VIRTANOUT_VALUE 1
6752
6757 #define PO_VIRTANOUT_VALWORD1 2
6758
6763 #define PO_VIRTANOUT_VALWORD2 3
6764
6765
6766 //=================================================================================================================
6767 // 0x2E00 VIRTCUSTOM_PROCESS - Virtual Customer Module Process Data
6768 //=================================================================================================================
6772 #define SDOINDEX_VIRTCUSTOM_PROCESS 0x2E00
6773
6778 #define VIRTCUSTOM_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_VIRTCUSTOM_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
6779
6784 #define VIRTCUSTOM_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_VIRTCUSTOM_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
6785
6790 #define VIRTCUSTOM_PROCESS(modno,parno) Sysvar[VIRTCUSTOM_PROCESS_INDEX((modno),(parno))]
6791
6794 #define VIRTCUSTOM_PROCESS_MAX 21
6795
6799 #define PO_VIRTCUSTOM_1 1
6800
6804 #define PO_VIRTCUSTOM_2 2
6805
6809 #define PO_VIRTCUSTOM_3 3
6810
6814 #define PO_VIRTCUSTOM_4 4
6815
6819 #define PO_VIRTCUSTOM_5 5
6820
6824 #define PO_VIRTCUSTOM_6 6
6825
6829 #define PO_VIRTCUSTOM_7 7
6830
6834 #define PO_VIRTCUSTOM_8 8
6835
6839 #define PO_VIRTCUSTOM_9 9
6840
6844 #define PO_VIRTCUSTOM_10 10
6845
6849 #define PO_VIRTCUSTOM_11 11
6850
6854 #define PO_VIRTCUSTOM_12 12
6855
6859 #define PO_VIRTCUSTOM_13 13
6860
6864 #define PO_VIRTCUSTOM_14 14
6865
6869 #define PO_VIRTCUSTOM_15 15
6870
6874 #define PO_VIRTCUSTOM_16 16
6875
6879 #define PO_VIRTCUSTOM_17 17
6880
6884 #define PO_VIRTCUSTOM_18 18
6885
6889 #define PO_VIRTCUSTOM_19 19
6890
6894 #define PO_VIRTCUSTOM_20 20
6895
6896
6897 //=================================================================================================================
6898 // 0x2E40 VIRTMATH_PROCESS - Virtual Math Module Process Data
6899 //=================================================================================================================
6903 #define SDOINDEX_VIRTMATH_PROCESS 0x2E40
6904
6909 #define VIRTMATH_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_VIRTMATH_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
6910
6915 #define VIRTMATH_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_VIRTMATH_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
6916
6921 #define VIRTMATH_PROCESS(modno,parno) Sysvar[VIRTMATH_PROCESS_INDEX((modno),(parno))]
6922
6925 #define VIRTMATH_PROCESS_MAX 7
6926
6931 #define PO_VIRTMATH_VALUE 1
6932
6936 #define PO_VIRTMATH_MODE_BASED_VALUE_1 2
6937
6941 #define PO_VIRTMATH_MODE_BASED_VALUE_2 3
6942
6946 #define PO_VIRTMATH_MODE_BASED_VALUE_3 4
6947
6951 #define PO_VIRTMATH_MODE_BASED_VALUE_4 5
6952
6956 #define PO_VIRTMATH_MODE_BASED_VALUE_5 6
6957
6958
6959 // Values for PO_VIRTMATH_MODE_BASED_VALUE:
6960 #define VIRTMATH_MODE_PID_PROP_VALUE 2 // Mode VIRTMATH_MODE_PID: Proportional value
6961 #define VIRTMATH_MODE_PID_INT_VALUE 3 // Mode VIRTMATH_MODE_PID: Integral value
6962 #define VIRTMATH_MODE_PID_DIFF_VALUE 4 // Mode VIRTMATH_MODE_PID: Differential value
6963 #define VIRTMATH_MODE_PID_PREV_ERROR 5 // Mode VIRTMATH_MODE_PID: Previous error
6964 #define VIRTMATH_MODE_PID_INT_SUM 6 // Mode VIRTMATH_MODE_PID: Actual integral sum
6965
6966 //=================================================================================================================
6967 // 0x3301 ECAT_SLAVE_PDO1_1_255 -
6968 //=================================================================================================================
6972 #define SDOINDEX_ECAT_SLAVE_PDO1_1_255 0x3301
6973
6977 #define ECAT_SLAVE_PDO1_1_255_INDEX(parno) ((0x01000000 | (SDOINDEX_ECAT_SLAVE_PDO1_1_255<<8)) | ((long) (parno)))
6978
6982 #define ECAT_SLAVE_PDO1_1_255_SRCINDEX(parno) ((SDOINDEX_ECAT_SLAVE_PDO1_1_255<<8) | ((long) (parno)))
6983
6987 #define ECAT_SLAVE_PDO1_1_255(parno) Sysvar[ECAT_SLAVE_PDO1_1_255_INDEX(parno)]
6988
6991 #define ECAT_SLAVE_PDO1_1_255_MAX 256
6992
6993 //=================================================================================================================
6994 // 0x3302 ECAT_SLAVE_PDO1_256_510 -
6995 //=================================================================================================================
6999 #define SDOINDEX_ECAT_SLAVE_PDO1_256_510 0x3302
7000
7004 #define ECAT_SLAVE_PDO1_256_510_INDEX(parno) ((0x01000000 | (SDOINDEX_ECAT_SLAVE_PDO1_256_510<<8)) | ((long) (parno)))
7005
7009 #define ECAT_SLAVE_PDO1_256_510_SRCINDEX(parno) ((SDOINDEX_ECAT_SLAVE_PDO1_256_510<<8) | ((long) (parno)))
7010
7014 #define ECAT_SLAVE_PDO1_256_510(parno) Sysvar[ECAT_SLAVE_PDO1_256_510_INDEX(parno)]
7015
7018 #define ECAT_SLAVE_PDO1_256_510_MAX 256
7019
7020 //=================================================================================================================
7021 // 0x3303 ECAT_SLAVE_PDO1_511_765 -
7022 //=================================================================================================================
7026 #define SDOINDEX_ECAT_SLAVE_PDO1_511_765 0x3303
7027
7031 #define ECAT_SLAVE_PDO1_511_765_INDEX(parno) ((0x01000000 | (SDOINDEX_ECAT_SLAVE_PDO1_511_765<<8)) | ((long) (parno)))
7032
7036 #define ECAT_SLAVE_PDO1_511_765_SRCINDEX(parno) ((SDOINDEX_ECAT_SLAVE_PDO1_511_765<<8) | ((long) (parno)))
7037
7041 #define ECAT_SLAVE_PDO1_511_765(parno) Sysvar[ECAT_SLAVE_PDO1_511_765_INDEX(parno)]
7042
7045 #define ECAT_SLAVE_PDO1_511_765_MAX 256
7046
7047 //=================================================================================================================
7048 // 0x3304 ECAT_SLAVE_PDO1_766_1020 -
7049 //=================================================================================================================
7053 #define SDOINDEX_ECAT_SLAVE_PDO1_766_1020 0x3304
7054
7058 #define ECAT_SLAVE_PDO1_766_1020_INDEX(parno) ((0x01000000 | (SDOINDEX_ECAT_SLAVE_PDO1_766_1020<<8)) | ((long) (parno)))
7059
7063 #define ECAT_SLAVE_PDO1_766_1020_SRCINDEX(parno) ((SDOINDEX_ECAT_SLAVE_PDO1_766_1020<<8) | ((long) (parno)))
7064
7068 #define ECAT_SLAVE_PDO1_766_1020(parno) Sysvar[ECAT_SLAVE_PDO1_766_1020_INDEX(parno)]
7069
7072 #define ECAT_SLAVE_PDO1_766_1020_MAX 256
7073
7074 //=================================================================================================================
7075 // 0x3305 ECAT_SLAVE_PDO2_1_255 -
7076 //=================================================================================================================
7080 #define SDOINDEX_ECAT_SLAVE_PDO2_1_255 0x3305
7081
7085 #define ECAT_SLAVE_PDO2_1_255_INDEX(parno) ((0x01000000 | (SDOINDEX_ECAT_SLAVE_PDO2_1_255<<8)) | ((long) (parno)))
7086
7090 #define ECAT_SLAVE_PDO2_1_255_SRCINDEX(parno) ((SDOINDEX_ECAT_SLAVE_PDO2_1_255<<8) | ((long) (parno)))
7091
7095 #define ECAT_SLAVE_PDO2_1_255(parno) Sysvar[ECAT_SLAVE_PDO2_1_255_INDEX(parno)]
7096
7099 #define ECAT_SLAVE_PDO2_1_255_MAX 256
7100
7101 //=================================================================================================================
7102 // 0x3306 ECAT_SLAVE_PDO2_256_510 -
7103 //=================================================================================================================
7107 #define SDOINDEX_ECAT_SLAVE_PDO2_256_510 0x3306
7108
7112 #define ECAT_SLAVE_PDO2_256_510_INDEX(parno) ((0x01000000 | (SDOINDEX_ECAT_SLAVE_PDO2_256_510<<8)) | ((long) (parno)))
7113
7117 #define ECAT_SLAVE_PDO2_256_510_SRCINDEX(parno) ((SDOINDEX_ECAT_SLAVE_PDO2_256_510<<8) | ((long) (parno)))
7118
7122 #define ECAT_SLAVE_PDO2_256_510(parno) Sysvar[ECAT_SLAVE_PDO2_256_510_INDEX(parno)]
7123
7126 #define ECAT_SLAVE_PDO2_256_510_MAX 256
7127
7128 //=================================================================================================================
7129 // 0x3307 ECAT_SLAVE_PDO2_511_765 -
7130 //=================================================================================================================
7134 #define SDOINDEX_ECAT_SLAVE_PDO2_511_765 0x3307
7135
7139 #define ECAT_SLAVE_PDO2_511_765_INDEX(parno) ((0x01000000 | (SDOINDEX_ECAT_SLAVE_PDO2_511_765<<8)) | ((long) (parno)))
7140
7144 #define ECAT_SLAVE_PDO2_511_765_SRCINDEX(parno) ((SDOINDEX_ECAT_SLAVE_PDO2_511_765<<8) | ((long) (parno)))
7145
7149 #define ECAT_SLAVE_PDO2_511_765(parno) Sysvar[ECAT_SLAVE_PDO2_511_765_INDEX(parno)]
7150
7153 #define ECAT_SLAVE_PDO2_511_765_MAX 256
7154
7155 //=================================================================================================================
7156 // 0x3308 ECAT_SLAVE_PDO2_766_1020 -
7157 //=================================================================================================================
7161 #define SDOINDEX_ECAT_SLAVE_PDO2_766_1020 0x3308
7162
7166 #define ECAT_SLAVE_PDO2_766_1020_INDEX(parno) ((0x01000000 | (SDOINDEX_ECAT_SLAVE_PDO2_766_1020<<8)) | ((long) (parno)))
7167
7171 #define ECAT_SLAVE_PDO2_766_1020_SRCINDEX(parno) ((SDOINDEX_ECAT_SLAVE_PDO2_766_1020<<8) | ((long) (parno)))
7172
7176 #define ECAT_SLAVE_PDO2_766_1020(parno) Sysvar[ECAT_SLAVE_PDO2_766_1020_INDEX(parno)]
7177
7180 #define ECAT_SLAVE_PDO2_766_1020_MAX 256
7181
7182 //=================================================================================================================
7183 // 0x3600 SMGLOBAL_PROCESS - Global State Machine Process Data
7184 //=================================================================================================================
7188 #define SDOINDEX_SMGLOBAL_PROCESS 0x3600
7189
7193 #define SMGLOBAL_PROCESS_INDEX(parno) ((0x01000000 | (SDOINDEX_SMGLOBAL_PROCESS<<8)) | ((long) (parno)))
7194
7198 #define SMGLOBAL_PROCESS_SRCINDEX(parno) ((SDOINDEX_SMGLOBAL_PROCESS<<8) | ((long) (parno)))
7199
7203 #define SMGLOBAL_PROCESS(parno) Sysvar[SMGLOBAL_PROCESS_INDEX(parno)]
7204
7207 #define SMGLOBAL_PROCESS_MAX 48
7208
7212 #define SM_PROC_RUNFLAGS 1
7213
7217 #define SM_PROC_PARAMCNT 2
7218
7223 #define SM_PROC_EVENTCNT 3
7224
7228 #define SM_PROC_STATECNT 4
7229
7233 #define SM_PROC_MACHINECNT 5
7234
7238 #define SM_PROC_POOLSIZE 6
7239
7243 #define SM_PROC_QUEUESIZE 7
7244
7248 #define SM_PROC_STATEDEPTH 8
7249
7253 #define SM_PROC_TIMERMAX 9
7254
7258 #define SM_PROC_SUBSIZE 10
7259
7263 #define SM_PROC_PRMSIZE 11
7264
7268 #define SM_PROC_POSSIZE 12
7269
7273 #define SM_PROC_SYSSIZE 13
7274
7278 #define SM_PROC_SYSCNT 14
7279
7283 #define SM_PROC_SMRUNSTATE 41
7284
7288 #define SM_PROC_SMRUNFLAGS 42
7289
7294 #define SM_PROC_MACHINE 43
7295
7299 #define SM_PROC_POOLUSED 44
7300
7304 #define SM_PROC_POOLFREE 45
7305
7309 #define SM_PROC_POOLMAX 46
7310
7314 #define SM_PROC_HISTORY 47
7315
7316
7317 //=================================================================================================================
7318 // 0x3601 SMMACHINE_PROCESS - State Machine Process Data
7319 //=================================================================================================================
7323 #define SDOINDEX_SMMACHINE_PROCESS 0x3601
7324
7329 #define SMMACHINE_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_SMMACHINE_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
7330
7335 #define SMMACHINE_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_SMMACHINE_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
7336
7341 #define SMMACHINE_PROCESS(modno,parno) Sysvar[SMMACHINE_PROCESS_INDEX((modno),(parno))]
7342
7345 #define SMMACHINE_PROCESS_MAX 121
7346
7351 #define SM_MACH_ID 1
7352
7357 #define SM_MACH_ARRAYCNT 2
7358
7363 #define SM_MACH_QUEUESIZE 3
7364
7369 #define SM_MACH_DATASIZE 4
7370
7374 #define SM_MACH_ROOTSTATE 5
7375
7379 #define SM_MACH_FLAGS 41
7380
7385 #define SM_MACH_STATE 42
7386
7390 #define SM_MACH_QUEUEUSED 43
7391
7395 #define SM_MACH_QUEUEFREE 44
7396
7400 #define SM_MACH_QUEUEMAX 45
7401
7405 #define SM_MACH_DATA_1 81
7406
7410 #define SM_MACH_DATA_2 82
7411
7415 #define SM_MACH_DATA_3 83
7416
7420 #define SM_MACH_DATA_4 84
7421
7425 #define SM_MACH_DATA_5 85
7426
7430 #define SM_MACH_DATA_6 86
7431
7435 #define SM_MACH_DATA_7 87
7436
7440 #define SM_MACH_DATA_8 88
7441
7445 #define SM_MACH_DATA_9 89
7446
7450 #define SM_MACH_DATA_10 90
7451
7455 #define SM_MACH_DATA_11 91
7456
7460 #define SM_MACH_DATA_12 92
7461
7465 #define SM_MACH_DATA_13 93
7466
7470 #define SM_MACH_DATA_14 94
7471
7475 #define SM_MACH_DATA_15 95
7476
7480 #define SM_MACH_DATA_16 96
7481
7485 #define SM_MACH_DATA_17 97
7486
7490 #define SM_MACH_DATA_18 98
7491
7495 #define SM_MACH_DATA_19 99
7496
7500 #define SM_MACH_DATA_20 100
7501
7505 #define SM_MACH_DATA_21 101
7506
7510 #define SM_MACH_DATA_22 102
7511
7515 #define SM_MACH_DATA_23 103
7516
7520 #define SM_MACH_DATA_24 104
7521
7525 #define SM_MACH_DATA_25 105
7526
7530 #define SM_MACH_DATA_26 106
7531
7535 #define SM_MACH_DATA_27 107
7536
7540 #define SM_MACH_DATA_28 108
7541
7545 #define SM_MACH_DATA_29 109
7546
7550 #define SM_MACH_DATA_30 110
7551
7555 #define SM_MACH_DATA_31 111
7556
7560 #define SM_MACH_DATA_32 112
7561
7565 #define SM_MACH_DATA_33 113
7566
7570 #define SM_MACH_DATA_34 114
7571
7575 #define SM_MACH_DATA_35 115
7576
7580 #define SM_MACH_DATA_36 116
7581
7585 #define SM_MACH_DATA_37 117
7586
7590 #define SM_MACH_DATA_38 118
7591
7595 #define SM_MACH_DATA_39 119
7596
7600 #define SM_MACH_DATA_40 120
7601
7602
7603 //=================================================================================================================
7604 // 0x4000 HWAMP_PARAM - HW Amplifier Parameters
7605 //=================================================================================================================
7609 #define SDOINDEX_HWAMP_PARAM 0x4000
7610
7615 #define HWAMP_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWAMP_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
7616
7621 #define HWAMP_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_HWAMP_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
7622
7627 #define HWAMP_PARAM(modno,parno) Sysvar[HWAMP_PARAM_INDEX((modno),(parno))]
7628
7631 #define HWAMP_PARAM_MAX 93
7632
7639 #define HWAMP_MODE 1
7640
7646 #define HWAMP_PISRC_CMDWORD 10
7647
7655 #define HWAMP_PISRC_REFPOS 11
7656
7662 #define HWAMP_PISRC_REFVEL 12
7663
7669 #define HWAMP_PISRC_REFACC 13
7670
7680 #define HWAMP_PISRC_ACTPOS 14
7681
7687 #define HWAMP_PISRC_ACTVEL 15
7688
7689 #define HWAMP_PISRC_MAX 20
7690
7698 #define HWAMP_VELKPROP 30
7699
7707 #define HWAMP_VELKINT 31
7708
7716 #define HWAMP_VELKILIM 32
7717
7725 #define HWAMP_CURKPROP 33
7726
7734 #define HWAMP_CURKINT 34
7735
7743 #define HWAMP_CURKILIM 35
7744
7749 #define HWAMP_COMMTYPE 36
7750
7758 #define HWAMP_PWMFREQ 37
7759
7765 #define HWAMP_POLES 38
7766
7772 #define HWAMP_AHEADANGLE 39
7773
7779 #define HWAMP_I2TTIME 40
7780
7788 #define HWAMP_CURFILTTIME 41
7789
7802 #define HWAMP_ENCRES 42
7803
7815 #define HWAMP_MAXCUR 43
7816
7822 #define HWAMP_POSDIR 44
7823
7833 #define HWAMP_MAXRPM 45
7834
7851 #define HWAMP_USERDEFINED_DATA0 46
7852
7869 #define HWAMP_USERDEFINED_DATA1 47
7870
7887 #define HWAMP_USERDEFINED_DATA2 48
7888
7905 #define HWAMP_USERDEFINED_DATA3 49
7906
7917 #define HWAMP_ELPOL 51
7918
7925 #define HWAMP_I2T_TRIPVALUE 53
7926
7931 #define HWAMP_I2T_CONT 54
7932
7940 #define HWAMP_CHOP_UDCMIN 55
7941
7949 #define HWAMP_CHOP_UDCMAX 56
7950
7957 #define HWAMP_VELPI_REFLIM 59
7958
7965 #define HWAMP_VELPI_OUTLIM 60
7966
7977 #define HWAMP_CURPI0_REFLIM 61
7978
7987 #define HWAMP_CURPI0_OUTLIM 62
7988
7999 #define HWAMP_CURPI1_REFLIM 63
8000
8009 #define HWAMP_CURPI1_OUTLIM 64
8010
8029 #define HWAMP_ELPOS_LAGMULT 65
8030
8037 #define HWAMP_TRIP_CURRENT 66
8038
8045 #define HWAMP_TEMP_MAX 67
8046
8053 #define HWAMP_VOLT_MIN 68
8054
8061 #define HWAMP_VOLT_MAX 69
8062
8069 #define HWAMP_CURPI_MODE 70
8070
8077 #define HWAMP_VELPI_MODE 71
8078
8094 #define HWAMP_PROG 72
8095
8100 #define HWAMP_PROG_PARAMVAL 73
8101
8114 #define HWAMP_PROG_PARAMIND 74
8115
8164 #define HWAMP_PROG_RETVAL 75
8165
8203 #define HWAMP_HALL_SIMULATOR 86
8204
8216 #define HWAMP_HALL_ERROR_LIMIT 87
8217
8228 #define HWAMP_HALL_ALIGNMENT 88
8229
8230 #define HWAMP_SW_VERSION 89
8231
8238 #define HWAMP_POSEL_OFFSET 90
8239
8255 #define HWAMP_DEFINE_PO_DATA_SET 91
8256
8267 #define HWAMP_IDQ_D_REF 92
8268
8269
8270 // Values for HWAMP_MODE:
8271 #define HWAMP_MODE_POS_VEL_CUR 0 // Pos -> Vel -> Cur -> PWM
8272 #define HWAMP_MODE_POS_VEL 1 // Pos -> Vel -> PWM
8273 #define HWAMP_MODE_POS_CUR 2 // Pos -> Cur -> PWM
8274 #define HWAMP_MODE_POS 3 // Pos -> PWM
8275 #define HWAMP_MODE_PFG_CUR_PWM 4 // Mode for all STEP and PMSM in open loop, with current control
8276 #define HWAMP_MODE_PFG_PWM 5 // Mode for all STEP and PMSM in open loop, without current control
8277 #define HWAMP_MODE_INT_CUR_PWM 6 // Mode only for HWAMP_COMMTYPE_CHOPPER: with current control
8278 #define HWAMP_MODE_INT_PWM 7 // Mode only for HWAMP_COMMTYPE_CHOPPER: without current control
8279
8280 // Values for HWAMP_COMMTYPE:
8281 #define HWAMP_COMMTYPE_NONE 0 // Amplifier disabled
8282 #define HWAMP_COMMTYPE_DC 1 // DC motor, two phases
8283 #define HWAMP_COMMTYPE_BLDC 2 // Brushless, three phases, block commutation, requires HALL sensor
8284 #define HWAMP_COMMTYPE_BLDC_120 2 // Brushless, three phases, block commutation, 120° hall sensors, Deprecated
8285 #define HWAMP_COMMTYPE_BLDC_60 3 // Brushless, three phases, block commutation, 60° hall sensors, Deprecated
8286 #define HWAMP_COMMTYPE_STEP 4 // Stepper motor, two phases bipolar
8287 #define HWAMP_COMMTYPE_HALL_PMSM 5 // Alignment with HALL sensor, else like PMSM
8288 #define HWAMP_COMMTYPE_DC_TWIN 6 // DC motor twin mode
8289 #define HWAMP_COMMTYPE_PMSM 7 // Brushless, three phases, sinusoidal commutation
8290 #define HWAMP_COMMTYPE_BLDC_TWIN 8 // Brushless, block commutation, requires HALL sensor, twin mode
8291 #define HWAMP_COMMTYPE_BLDC_120_TWIN 8 // Brushless, block commutation, 120° hall sensors, twin mode, Deprecated
8292 #define HWAMP_COMMTYPE_BLDC_60_TWIN 9 // Brushless, block commutation, 60° hall sensors, twin mode, Deprecated
8293 #define HWAMP_COMMTYPE_STEP_TWIN 10 // Stepper motor, two phases bipolar, twin mode
8294 #define HWAMP_COMMTYPE_HALL_PMSM_TWIN 11 // Alignment with HALL sensor, else like PMSM_TWIN
8295 #define HWAMP_COMMTYPE_PMSM_TWIN 12 // Brushless, three phases, sinusoidal commutation, twin mode
8296 #define HWAMP_COMMTYPE_CHOPPER 13 // Brake chopper, RL load required
8297 #define HWAMP_COMMTYPE_DC_ALT 14 // Only for internal use
8298 #define HWAMP_COMMTYPE_DC_100 15 // Only for internal use
8299
8300 // Values for HWAMP_ENCRES:
8301 #define HWAMP_ENCRES_MICROSTEP_RES 1024 // This is a constant factor, which is used to calculate the value of the parameter HWAMP_ENCRES
8302
8303 // Values for HWAMP_POSDIR:
8304 #define HWAMP_POSDIR_NORMAL 1 // Direction normal
8305 #define HWAMP_POSDIR_REVERSE -1 // Direction reverse
8306
8307 // Values for HWAMP_ELPOL:
8308 #define HWAMP_ELPOL_REGULAR 1 // Electrical polarity is equal encoder's polarity
8309 #define HWAMP_ELPOL_INVERS -1 // Deprecated, wrong spelling, Use HWAMP_ELPOL_INVERSE
8310 #define HWAMP_ELPOL_INVERSE -1 // Electrical polarity is inverse to encoder's polarity
8311
8312 // Values for HWAMP_HALL_ALIGNMENT:
8313 #define HALL_ALIGNMENT_BOTTOM 0 // First element
8314 #define HALL_ALIGNMENT_360120240 0 // 120° CCW: H1 at 360°, H2 at 120°, H3 at 240°
8315 #define HALL_ALIGNMENT_060180300 1 // 120° CCW: H1 at 060°, H2 at 180°, H3 at 300°
8316 #define HALL_ALIGNMENT_120240360 2 // 120° CCW: H1 at 120°, H2 at 240°, H3 at 360°
8317 #define HALL_ALIGNMENT_180300060 3 // 120° CCW: H1 at 180°, H2 at 300°, H3 at 060°
8318 #define HALL_ALIGNMENT_240360120 4 // 120° CCW: H1 at 240°, H2 at 360°, H3 at 120°
8319 #define HALL_ALIGNMENT_300060180 5 // 120° CCW: H1 at 300°, H2 at 060°, H3 at 180°
8320 #define HALL_ALIGNMENT_120DEGREE 5 // 120° standard: same as ALIGNMENT_300060180
8321 #define HALL_ALIGNMENT_360240120 6 // 120° CW: H1 at 360°, H2 at 240°, H3 at 120°
8322 #define HALL_ALIGNMENT_060300180 7 // 120° CW: H1 at 060°, H2 at 300°, H3 at 180°
8323 #define HALL_ALIGNMENT_120360240 8 // 120° CW: H1 at 120°, H2 at 360°, H3 at 240°
8324 #define HALL_ALIGNMENT_180060300 9 // 120° CW: H1 at 180°, H2 at 060°, H3 at 300°
8325 #define HALL_ALIGNMENT_240120360 10 // 120° CW: H1 at 240°, H2 at 120°, H3 at 360°
8326 #define HALL_ALIGNMENT_300180060 11 // 120° CW: H1 at 300°, H2 at 180°, H3 at 060°
8327 #define HALL_ALIGNMENT_360060120 12 // 60° CCW: H1 at 360°, H2 at 060°, H3 at 120°
8328 #define HALL_ALIGNMENT_060120180 13 // 60° CCW: H1 at 060°, H2 at 120°, H3 at 180°
8329 #define HALL_ALIGNMENT_120180240 14 // 60° CCW: H1 at 120°, H2 at 180°, H3 at 240°
8330 #define HALL_ALIGNMENT_180240300 15 // 60° CCW: H1 at 180°, H2 at 240°, H3 at 300°
8331 #define HALL_ALIGNMENT_240300360 16 // 60° CCW: H1 at 240°, H2 at 300°, H3 at 360°
8332 #define HALL_ALIGNMENT_300360060 17 // 60° CCW: H1 at 300°, H2 at 360°, H3 at 060°
8333 #define HALL_ALIGNMENT_360120060 18 // 60° CW: H1 at 360°, H2 at 120°, H3 at 060°
8334 #define HALL_ALIGNMENT_060180120 19 // 60° CW: H1 at 060°, H2 at 180°, H3 at 120°
8335 #define HALL_ALIGNMENT_120240180 20 // 60° CW: H1 at 120°, H2 at 240°, H3 at 180°
8336 #define HALL_ALIGNMENT_180300240 21 // 60° CW: H1 at 180°, H2 at 300°, H3 at 240°
8337 #define HALL_ALIGNMENT_240360300 22 // 60° CW: H1 at 240°, H2 at 360°, H3 at 300°
8338 #define HALL_ALIGNMENT_060DEGREE 22 // 60° standard: same as ALIGNMENT_240360300
8339 #define HALL_ALIGNMENT_300060360 23 // 60° CW: H1 at 300°, H2 at 060°, H3 at 360°
8340 #define HALL_ALIGNMENT_TOP 23 // Last valid element
8341 #define HALL_ALIGNMENT_ERROR 24 // No valid alignment
8342
8343 // Values for HWAMP_DEFINE_PO_DATA_SET:
8344 #define HWAMP_PO_DATA_SET_FIRST 1 // First set
8345 #define HWAMP_PO_DATA_SET_LAST 9 // Last set
8346 #define HWAMP_PO_DATA_SET_1_OFFSET 1 // Offset of SET1, see example
8347 #define HWAMP_PO_DATA_SET_2_OFFSET 1000 // Offset of SET2, see example
8348 #define HWAMP_PO_DATA_SET_MAX_LENGTH 6 // Max length of a set. SET1 and SET2 have each this length.
8349 #define HWAMP_PO_DATA_SET_IMEAS 1 // Actual not filtered half bridge current in [mA], order: depends on COMMTYPE. This is the default set for set 1.
8350 #define HWAMP_PO_DATA_SET_IMEASFIL 2 // Actual filtered half bridge current in [mA], order: depends on COMMTYPE. This is the default set for set 2.
8351 #define HWAMP_PO_DATA_SET_CUR_CALIB_OFFSET 3 // Used current calibration offset in [mA], order: depends on COMMTYPE
8352 #define HWAMP_PO_DATA_SET_CUR_CALIB_STATE 4 // State of current calibrartion, see CurCalibState, order: depends on COMMTYPE
8353 #define HWAMP_PO_DATA_SET_CUR_CALIB_GAIN 5 // Used current calibration gain, value range -10000...10000, order: depends on COMMTYPE
8354 #define HWAMP_PO_DATA_SET_DEVICE_SPECIFIC_1 6 // Depends on device, returns 0 if nothing implemented
8355 #define HWAMP_PO_DATA_SET_DEVICE_SPECIFIC_2 7 // Depends on device, returns 0 if nothing implemented
8356 #define HWAMP_PO_DATA_SET_I2T_ACT 8 // Actual half bridge I2T value, order: depends on COMMTYPE
8357 #define HWAMP_PO_DATA_SET_CUR_RAW 9 // Actual raw value of ADC's current sense, order: depends on COMMTYPE
8358
8359 //=================================================================================================================
8360 // 0x4040 HWENC_PARAM - HW Encoder Parameters
8361 //=================================================================================================================
8365 #define SDOINDEX_HWENC_PARAM 0x4040
8366
8371 #define HWENC_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWENC_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
8372
8377 #define HWENC_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_HWENC_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
8378
8383 #define HWENC_PARAM(modno,parno) Sysvar[HWENC_PARAM_INDEX((modno),(parno))]
8384
8387 #define HWENC_PARAM_MAX 44
8388
8395 #define HWENCODER_MODE 1
8396
8404 #define HWENCODER_ISABSOLUTE 2
8405
8418 #define HWENCODER_PISRC_ENCOUT 10
8419
8441 #define HWENCODER_PISRC_REFOUT 11
8442
8450 #define HWENCODER_GLITCHFILT 30
8451
8464 #define HWENCODER_CLOCKFREQ 31
8465
8473 #define HWENCODER_DATLEN 32
8474
8486 #define HWENCODER_DELAY 33
8487
8493 #define HWENCODER_TERM 34
8494
8500 #define HWENCODER_BUSID 35
8501
8507 #define HWENCODER_BAUDRATE 36
8508
8514 #define HWENCODER_PARITY 37
8515
8524 #define HWENCODER_MONITORING 38
8525
8533 #define HWENCODER_CLOCK_ACTIVE 39
8534
8542 #define HWENCODER_FAST_UPDATE 40
8543
8553 #define HWENCODER_REVERSE_DIRECTION 41
8554
8562 #define HWENCODER_POSBITS 42
8563
8571 #define HWENCODER_TRAILBITS 43
8572
8573
8574 // Values for HWENCODER_MODE:
8575 #define HWENCODER_MODE_INCREMENTAL 0 // Incremental Encoder Input
8576 #define HWENCODER_MODE_INCROUTPUT 1 // Incremental Encoder Output
8577 #define HWENCODER_MODE_SSI_ACTIVE 2 // SSI Encoder active clock
8578 #define HWENCODER_MODE_SSI_PASSIVE 3 // SSI Encoder passive clock
8579 #define HWENCODER_MODE_HIPERFACE_RX 4 // Hiperface Encoder receiving
8580 #define HWENCODER_MODE_HIPERFACE_TX 5 // Hiperface Encoder sending
8581 #define HWENCODER_MODE_SINCOS 6 // Sin/Cos Encoder
8582 #define HWENCODER_MODE_HALL 7 // HALL Sensor
8583 #define HWENCODER_MODE_ENDAT 9 // EnDat Encoder
8584
8585 // Values for HWENCODER_FAST_UPDATE:
8586 #define HWENCODER_FAST_UPDATE_ENABLE 1
8587 #define HWENCODER_FAST_UPDATE_DISABLE 0
8588
8589 // Values for HWENCODER_REVERSE_DIRECTION:
8590 #define HWENCODER_REVERSE_DIRECTION_NORMAL 0 // Normal counting direction
8591 #define HWENCODER_REVERSE_DIRECTION_INVERSE 1 // Inverse counting direction
8592
8593 //=================================================================================================================
8594 // 0x4070 HWHALL_PARAM - HW Hall Sensor Parameters
8595 //=================================================================================================================
8599 #define SDOINDEX_HWHALL_PARAM 0x4070
8600
8605 #define HWHALL_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWHALL_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
8606
8611 #define HWHALL_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_HWHALL_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
8612
8617 #define HWHALL_PARAM(modno,parno) Sysvar[HWHALL_PARAM_INDEX((modno),(parno))]
8618
8621 #define HWHALL_PARAM_MAX 11
8622
8632 #define HWHALL_MODE 1
8633
8643 #define HWHALL_PISRC_ENCOUT 10
8644
8645
8646 // Values for HWHALL_MODE:
8647 #define HWHALL_MODE_DISABLE 0 // Disable hall port
8648 #define HWHALL_MODE_ENABLE 1 // Enable hall port
8649 #define HWHALL_MODE_ENABLE_VEL 2 // Enable hall with velocity measurement
8650
8651 //=================================================================================================================
8652 // 0x4080 HWCOUNTINC_PARAM - HW Counter-inc Parameters
8653 //=================================================================================================================
8657 #define SDOINDEX_HWCOUNTINC_PARAM 0x4080
8658
8663 #define HWCOUNTINC_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWCOUNTINC_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
8664
8669 #define HWCOUNTINC_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_HWCOUNTINC_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
8670
8675 #define HWCOUNTINC_PARAM(modno,parno) Sysvar[HWCOUNTINC_PARAM_INDEX((modno),(parno))]
8676
8679 #define HWCOUNTINC_PARAM_MAX 35
8680
8688 #define HWCNTINC_MODE 1
8689
8702 #define HWCNTINC_PISRC_COUNTER 10
8703
8725 #define HWCNTINC_PISRC_TRIGGER 11
8726
8738 #define HWCNTINC_SLOPE 30
8739
8752 #define HWCNTINC_INTERPOL 31
8753
8761 #define HWCNTINC_SCALE 32
8762
8769 #define HWCNTINC_UPDATERATE 33
8770
8781 #define HWCNTINC_RESOLUTION 34
8782
8783
8784 // Values for HWCNTINC_PISRC_TRIGGER:
8785 #define HWCNTINC_PISRC_TRIGGER_ENCZ 0x000 // Encoder Index line
8786 #define HWCNTINC_PISRC_TRIGGER_VMZ 0x040 // Virtual Master
8787 #define HWCNTINC_PISRC_TRIGGER_DDSZ 0x080 // DDS
8788 #define HWCNTINC_PISRC_TRIGGER_BRDA 0x0C0 // Bridge A Signals
8789 #define HWCNTINC_PISRC_TRIGGER_BRDB 0x100 // Bridge B Signals
8790 #define HWCNTINC_PISRC_TRIGGER_DINP 0x140 // Digital Input
8791 #define HWCNTINC_PISRC_TRIGGER_DOUT 0x180 // Digital Output
8792 #define HWCNTINC_PISRC_TRIGGER_CMPG 0x1C0 // Compare GreaterThan
8793 #define HWCNTINC_PISRC_TRIGGER_CMPL 0x200 // Compare LessThan
8794 #define HWCNTINC_PISRC_TRIGGER_PULS 0x240 // Pulse Generator
8795 #define HWCNTINC_PISRC_TRIGGER_SHIFT 0x280 // Shift Register
8796 #define HWCNTINC_PISRC_TRIGGER_IRQ 0x2C0 // SOC Interrupt
8797 #define HWCNTINC_PISRC_TRIGGER_NOT 0xFFC0 // No trigger
8798
8799 // Values for HWCNTINC_SLOPE:
8800 #define HWCNTINC_SLOPE_CONTINUOUS 0 // Continuous reset signal
8801 #define HWCNTINC_SLOPE_RISING 1 // Rising reset signal
8802 #define HWCNTINC_SLOPE_FALLING 2 // Falling reset signal
8803 #define HWCNTINC_SLOPE_BOTH 3 // Rising/ Falling reset signal
8804
8805 //=================================================================================================================
8806 // 0x40C0 HWCOUNTABS_PARAM - HW Counter-abs Parameters
8807 //=================================================================================================================
8811 #define SDOINDEX_HWCOUNTABS_PARAM 0x40C0
8812
8817 #define HWCOUNTABS_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWCOUNTABS_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
8818
8823 #define HWCOUNTABS_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_HWCOUNTABS_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
8824
8829 #define HWCOUNTABS_PARAM(modno,parno) Sysvar[HWCOUNTABS_PARAM_INDEX((modno),(parno))]
8830
8833 #define HWCOUNTABS_PARAM_MAX 11
8834
8842 #define HWCNTABS_MODE 1
8843
8853 #define HWCNTABS_CODING 2
8854
8862 #define HWCNTABS_PISCR_COUNTER 10
8863
8864
8865 // Values for HWCNTABS_CODING:
8866 #define HWCNTABS_CODING_GREY 0 // Gray code (typo)
8867 #define HWCNTABS_CODING_GRAY 0 // Gray code (default)
8868 #define HWCNTABS_CODING_NONE 1 // Binary
8869
8870 //=================================================================================================================
8871 // 0x4100 HWCOUNTUNI_PARAM - HW Counter-universal Parameters
8872 //=================================================================================================================
8876 #define SDOINDEX_HWCOUNTUNI_PARAM 0x4100
8877
8882 #define HWCOUNTUNI_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWCOUNTUNI_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
8883
8888 #define HWCOUNTUNI_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_HWCOUNTUNI_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
8889
8894 #define HWCOUNTUNI_PARAM(modno,parno) Sysvar[HWCOUNTUNI_PARAM_INDEX((modno),(parno))]
8895
8898 #define HWCOUNTUNI_PARAM_MAX 32
8899
8905 #define HWCNTUNI_MODE 1
8906
8929 #define HWCNTUNI_PISRC_COUNTER 10
8930
8950 #define HWCNTUNI_PISRC_CLEARSIG 11
8951
8961 #define HWCNTUNI_CLRSLOPE 30
8962
8972 #define HWCNTUNI_SRCSLOPE 31
8973
8974
8975 // Values for HWCNTUNI_MODE:
8976 #define HW_CNTUNI_MODE_ENCSRC 0 // Encoder source /+/-)
8977 #define HW_CNTUNI_MODE_REFSRC 1 // Reference source (+)
8978 #define HW_CNTUNI_MODE_SINGLENCA 2 // Single encoder source A (+)
8979 #define HW_CNTUNI_MODE_SINGLENCB 3 // Single encoder source B (+)
8980 #define HW_CNTUNI_MODE_RESETOFFSET 0x8000 // Clear (add this value to mode to clear)
8981
8982 //=================================================================================================================
8983 // 0x4120 HWCMPUNI_PARAM - HW Comparator-universal Parameters
8984 //=================================================================================================================
8988 #define SDOINDEX_HWCMPUNI_PARAM 0x4120
8989
8994 #define HWCMPUNI_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWCMPUNI_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
8995
9000 #define HWCMPUNI_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_HWCMPUNI_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
9001
9006 #define HWCMPUNI_PARAM(modno,parno) Sysvar[HWCMPUNI_PARAM_INDEX((modno),(parno))]
9007
9010 #define HWCMPUNI_PARAM_MAX 34
9011
9017 #define HWCMPUNI_MODE 1
9018
9025 #define HWCMPUNI_PISRC_COUNTER 10
9026
9036 #define HWCMPUNI_POLUL 30
9037
9047 #define HWCMPUNI_POLLL 31
9048
9054 #define HWCMPUNI_UPLIMIT 32
9055
9061 #define HWCMPUNI_LOLIMIT 33
9062
9063
9064 //=================================================================================================================
9065 // 0x4140 HWLATCH_PARAM - HW Latch Register Parameters
9066 //=================================================================================================================
9070 #define SDOINDEX_HWLATCH_PARAM 0x4140
9071
9076 #define HWLATCH_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWLATCH_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
9077
9082 #define HWLATCH_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_HWLATCH_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
9083
9088 #define HWLATCH_PARAM(modno,parno) Sysvar[HWLATCH_PARAM_INDEX((modno),(parno))]
9089
9092 #define HWLATCH_PARAM_MAX 33
9093
9101 #define HWLATCH_MODE 1
9102
9111 #define HWLATCH_PISRC_COUNTER 10
9112
9134 #define HWLATCH_PISRC_TRIGGER 11
9135
9143 #define HWLATCH_PISRC_CMDWORD 12
9144
9154 #define HWLATCH_SLOPE 30
9155
9168 #define HWLATCH_PAR_DIGIN_VALIDATOR 31
9169
9177 #define HWLATCH_STARTADC 32
9178
9179
9180 // Values for HWLATCH_PISRC_TRIGGER:
9181 #define HWLATCH_PISRC_TRIGGER_ENCZ 0x0000 // Encoder Index line
9182 #define HWLATCH_PISRC_TRIGGER_VMZ 0x0040 // Virtual Master
9183 #define HWLATCH_PISRC_TRIGGER_DDSZ 0x0080 // DDS
9184 #define HWLATCH_PISRC_TRIGGER_BRDA 0x00C0 // Bridge A Signals
9185 #define HWLATCH_PISRC_TRIGGER_BRDB 0x0100 // Bridge B Signals
9186 #define HWLATCH_PISRC_TRIGGER_DINP 0x0140 // Digital Input
9187 #define HWLATCH_PISRC_TRIGGER_DOUT 0x0180 // Digital Output
9188 #define HWLATCH_PISRC_TRIGGER_CMPG 0x01C0 // Compare GreaterThan
9189 #define HWLATCH_PISRC_TRIGGER_CMPL 0x0200 // Compare LessThan
9190 #define HWLATCH_PISRC_TRIGGER_PULS 0x0240 // Pulse Generator
9191 #define HWLATCH_PISRC_TRIGGER_SHIFT 0x0280 // Shift Register
9192 #define HWLATCH_PISRC_TRIGGER_IRQ 0x02C0 // SOC Interrupt
9193 #define HWLATCH_PISRC_TRIGGER_NOT 0xFFC0 // No trigger
9194
9195 // Values for HWLATCH_SLOPE:
9196 #define HWLATCH_SLOPE_CONTINUOUS 0 // Continuous trigger signal
9197 #define HWLATCH_SLOPE_RISING 1 // Rising trigger signal
9198 #define HWLATCH_SLOPE_FALLING 2 // Falling trigger signal
9199 #define HWLATCH_SLOPE_BOTH 3 // Rising/ Falling trigger signal
9200
9201 // Values for HWLATCH_PAR_DIGIN_VALIDATOR:
9202 #define HWLATCH_PAR_DIGIN_VALIDATOR_NONE 0 // Always accept
9203 #define HWLATCH_PAR_DIGIN_VALIDATOR_HIGH_DINP1 1 // High Din 1
9204 #define HWLATCH_PAR_DIGIN_VALIDATOR_HIGH_DINP2 2 // High Din 2
9205 #define HWLATCH_PAR_DIGIN_VALIDATOR_LOW_DINP1 -1 // Low Din 1
9206 #define HWLATCH_PAR_DIGIN_VALIDATOR_LOW_DINP2 -2 // Low Din 2
9207
9208 //=================================================================================================================
9209 // 0x4180 HWSIGGEN_PARAM - HW Signalgen (Enc/Pulse) Parameters
9210 //=================================================================================================================
9214 #define SDOINDEX_HWSIGGEN_PARAM 0x4180
9215
9220 #define HWSIGGEN_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWSIGGEN_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
9221
9226 #define HWSIGGEN_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_HWSIGGEN_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
9227
9232 #define HWSIGGEN_PARAM(modno,parno) Sysvar[HWSIGGEN_PARAM_INDEX((modno),(parno))]
9233
9236 #define HWSIGGEN_PARAM_MAX 32
9237
9245 #define HWSIGGEN_MODE 1
9246
9257 #define HWSIGGEN_PISRC_VELOCITY 10
9258
9267 #define HWSIGGEN_PISRC_SYNC 11
9268
9278 #define HWSIGGEN_POLARITY 30
9279
9290 #define HWSIGGEN_SIGDIST 31
9291
9292
9293 // Values for HWSIGGEN_MODE:
9294 #define HWSIGGEN_MODE_DISABLE 0 // Disable the signal generator
9295 #define HWSIGGEN_MODE_ENABLE 1 // Enable the signal generator
9296 #define HWSIGGEN_MODE_ENABLE_SPECIAL 2 // Enable the signal generator additionally to an incremental encoder (only trigger signal)
9297
9298 //=================================================================================================================
9299 // 0x41C0 HWDDS_PARAM - HW DDS Parameters
9300 //=================================================================================================================
9304 #define SDOINDEX_HWDDS_PARAM 0x41C0
9305
9310 #define HWDDS_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWDDS_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
9311
9316 #define HWDDS_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_HWDDS_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
9317
9322 #define HWDDS_PARAM(modno,parno) Sysvar[HWDDS_PARAM_INDEX((modno),(parno))]
9323
9326 #define HWDDS_PARAM_MAX 35
9327
9335 #define HWDDS_MODE 1
9336
9349 #define HWDDS_PISRC_ENCSIG 10
9350
9358 #define HWDDS_PISRC_SYNC 11
9359
9369 #define HWDDS_POLARITY 30
9370
9381 #define HWDDS_SIGDIST 31
9382
9390 #define HWDDS_NUMERATOR 32
9391
9399 #define HWDDS_DENOMINATOR 33
9400
9412 #define HWDDS_ENAREVMCOMP 34
9413
9414
9415 //=================================================================================================================
9416 // 0x41D0 HWPWMGEN_PARAM - HW PWM Generator Parameters
9417 //=================================================================================================================
9421 #define SDOINDEX_HWPWMGEN_PARAM 0x41D0
9422
9427 #define HWPWMGEN_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWPWMGEN_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
9428
9433 #define HWPWMGEN_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_HWPWMGEN_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
9434
9439 #define HWPWMGEN_PARAM(modno,parno) Sysvar[HWPWMGEN_PARAM_INDEX((modno),(parno))]
9440
9443 #define HWPWMGEN_PARAM_MAX 11
9444
9450 #define HWPWMGEN_MODE 1
9451
9461 #define HWPWMGEN_POLARITY 2
9462
9472 #define HWPWMGEN_FREQUENCY 3
9473
9484 #define HWPWMGEN_DUTYCYCLE_RANGE 4
9485
9494 #define HWPWMGEN_PISRC_DUTYCYCLE 10
9495
9496
9497 // Values for HWPWMGEN_MODE:
9498 #define HWPWMGEN_MODE_SIGNED 0 // Input value is a signed 16bit value
9499 #define HWPWMGEN_MODE_UNSIGNED 1 // Input value is an unsigned 16bit value
9500
9501 // Values for HWPWMGEN_POLARITY:
9502 #define HWPWMGEN_POLARITY_POSITIVE 0 // Output Signal is not inverted
9503 #define HWPWMGEN_POLARITY_NEGATIVE 1 // Output Signal is inverted
9504
9505 //=================================================================================================================
9506 // 0x41E0 HWPULSGEN_PARAM - HW Pulsgen Parameters
9507 //=================================================================================================================
9511 #define SDOINDEX_HWPULSGEN_PARAM 0x41E0
9512
9517 #define HWPULSGEN_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWPULSGEN_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
9518
9523 #define HWPULSGEN_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_HWPULSGEN_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
9524
9529 #define HWPULSGEN_PARAM(modno,parno) Sysvar[HWPULSGEN_PARAM_INDEX((modno),(parno))]
9530
9533 #define HWPULSGEN_PARAM_MAX 34
9534
9544 #define HWPULSGEN_MODE 1
9545
9558 #define HWPULSGEN_PISRC_ENCSIG 10
9559
9581 #define HWPULSGEN_PISRC_SYNC 11
9582
9592 #define HWPULSGEN_POLARITY 30
9593
9603 #define HWPULSGEN_SIGDIST 31
9604
9614 #define HWPULSGEN_SIGLENGTH 32
9615
9626 #define HWPULSGEN_NOCOMP 33
9627
9628
9629 //=================================================================================================================
9630 // 0x41F0 HWSHIFTREG_PARAM - HW Shift Register Parameters
9631 //=================================================================================================================
9635 #define SDOINDEX_HWSHIFTREG_PARAM 0x41F0
9636
9641 #define HWSHIFTREG_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWSHIFTREG_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
9642
9647 #define HWSHIFTREG_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_HWSHIFTREG_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
9648
9653 #define HWSHIFTREG_PARAM(modno,parno) Sysvar[HWSHIFTREG_PARAM_INDEX((modno),(parno))]
9654
9657 #define HWSHIFTREG_PARAM_MAX 31
9658
9668 #define HWSHIFTREG_MODE 1
9669
9683 #define HWSHIFTREG_PISRC_ENCSIG 10
9684
9706 #define HWSHIFTREG_PISRC_DATA 11
9707
9718 #define HWSHIFTREG_DELAY 30
9719
9720
9721 //=================================================================================================================
9722 // 0x4200 HWDIGIN_PARAM - HW Digital Input Parameters
9723 //=================================================================================================================
9727 #define SDOINDEX_HWDIGIN_PARAM 0x4200
9728
9733 #define HWDIGIN_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWDIGIN_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
9734
9739 #define HWDIGIN_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_HWDIGIN_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
9740
9745 #define HWDIGIN_PARAM(modno,parno) Sysvar[HWDIGIN_PARAM_INDEX((modno),(parno))]
9746
9749 #define HWDIGIN_PARAM_MAX 63
9750
9756 #define HWDIGIN_MODE 1
9757
9767 #define HWDIGIN_POLARITY 30
9768
9784 #define HWDIGIN_GLITCHFILT1 31
9785
9801 #define HWDIGIN_GLITCHFILT2 32
9802
9818 #define HWDIGIN_GLITCHFILT3 33
9819
9835 #define HWDIGIN_GLITCHFILT4 34
9836
9852 #define HWDIGIN_GLITCHFILT5 35
9853
9869 #define HWDIGIN_GLITCHFILT6 36
9870
9886 #define HWDIGIN_GLITCHFILT7 37
9887
9903 #define HWDIGIN_GLITCHFILT8 38
9904
9920 #define HWDIGIN_GLITCHFILT9 39
9921
9937 #define HWDIGIN_GLITCHFILT10 40
9938
9954 #define HWDIGIN_GLITCHFILT11 41
9955
9971 #define HWDIGIN_GLITCHFILT12 42
9972
9988 #define HWDIGIN_GLITCHFILT13 43
9989
10005 #define HWDIGIN_GLITCHFILT14 44
10006
10022 #define HWDIGIN_GLITCHFILT15 45
10023
10039 #define HWDIGIN_GLITCHFILT16 46
10040
10056 #define HWDIGIN_GLITCHFILT17 47
10057
10073 #define HWDIGIN_GLITCHFILT18 48
10074
10090 #define HWDIGIN_GLITCHFILT19 49
10091
10107 #define HWDIGIN_GLITCHFILT20 50
10108
10124 #define HWDIGIN_GLITCHFILT21 51
10125
10141 #define HWDIGIN_GLITCHFILT22 52
10142
10158 #define HWDIGIN_GLITCHFILT23 53
10159
10175 #define HWDIGIN_GLITCHFILT24 54
10176
10192 #define HWDIGIN_GLITCHFILT25 55
10193
10209 #define HWDIGIN_GLITCHFILT26 56
10210
10226 #define HWDIGIN_GLITCHFILT27 57
10227
10243 #define HWDIGIN_GLITCHFILT28 58
10244
10260 #define HWDIGIN_GLITCHFILT29 59
10261
10277 #define HWDIGIN_GLITCHFILT30 60
10278
10294 #define HWDIGIN_GLITCHFILT31 61
10295
10311 #define HWDIGIN_GLITCHFILT32 62
10312
10313
10314 //=================================================================================================================
10315 // 0x4240 HWDIGOUT_PARAM - HW Digital Output Parameters
10316 //=================================================================================================================
10320 #define SDOINDEX_HWDIGOUT_PARAM 0x4240
10321
10326 #define HWDIGOUT_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWDIGOUT_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
10327
10332 #define HWDIGOUT_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_HWDIGOUT_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
10333
10338 #define HWDIGOUT_PARAM(modno,parno) Sysvar[HWDIGOUT_PARAM_INDEX((modno),(parno))]
10339
10342 #define HWDIGOUT_PARAM_MAX 18
10343
10353 #define HWDIGOUT_MODE 1
10354
10364 #define HWDIGOUT_PISRC_MAP1 10
10365
10375 #define HWDIGOUT_PISRC_MAP2 11
10376
10386 #define HWDIGOUT_PISRC_MAP3 12
10387
10397 #define HWDIGOUT_PISRC_MAP4 13
10398
10426 #define HWDIGOUT_PISRC_BIT1 14
10427
10455 #define HWDIGOUT_PISRC_BIT2 15
10456
10484 #define HWDIGOUT_PISRC_BIT3 16
10485
10513 #define HWDIGOUT_PISRC_BIT4 17
10514
10515
10516 //=================================================================================================================
10517 // 0x4280 HWANIN_PARAM - HW Analog Input Parameters
10518 //=================================================================================================================
10522 #define SDOINDEX_HWANIN_PARAM 0x4280
10523
10528 #define HWANIN_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWANIN_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
10529
10534 #define HWANIN_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_HWANIN_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
10535
10540 #define HWANIN_PARAM(modno,parno) Sysvar[HWANIN_PARAM_INDEX((modno),(parno))]
10541
10544 #define HWANIN_PARAM_MAX 33
10545
10551 #define HWANIN_MODE 1
10552
10558 #define HWANIN_OFFSET 30
10559
10570 #define HWANIN_FILTTIME 31
10571
10582 #define HWANIN_SCALING 32
10583
10584
10585 //=================================================================================================================
10586 // 0x42C0 HWANOUT_PARAM - HW Analog Output Parameters
10587 //=================================================================================================================
10591 #define SDOINDEX_HWANOUT_PARAM 0x42C0
10592
10597 #define HWANOUT_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWANOUT_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
10598
10603 #define HWANOUT_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_HWANOUT_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
10604
10609 #define HWANOUT_PARAM(modno,parno) Sysvar[HWANOUT_PARAM_INDEX((modno),(parno))]
10610
10613 #define HWANOUT_PARAM_MAX 31
10614
10624 #define HWANOUT_MODE 1
10625
10633 #define HWANOUT_PISRC_VALUE 10
10634
10642 #define HWANOUT_OFFSET 30
10643
10644
10645 //=================================================================================================================
10646 // 0x4300 HWSIGBUS_PARAM - HW Signalbridges/bus ENC-REF Parameters
10647 //=================================================================================================================
10651 #define SDOINDEX_HWSIGBUS_PARAM 0x4300
10652
10657 #define HWSIGBUS_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWSIGBUS_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
10658
10663 #define HWSIGBUS_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_HWSIGBUS_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
10664
10669 #define HWSIGBUS_PARAM(modno,parno) Sysvar[HWSIGBUS_PARAM_INDEX((modno),(parno))]
10670
10673 #define HWSIGBUS_PARAM_MAX 11
10674
10687 #define HWBRENCREF_PISRC_ENCSIG 10
10688
10689
10690 //=================================================================================================================
10691 // 0x4310 HWBRREFENC_PARAM - HW Signalbridges/bus REF-ENC Parameters
10692 //=================================================================================================================
10696 #define SDOINDEX_HWBRREFENC_PARAM 0x4310
10697
10702 #define HWBRREFENC_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWBRREFENC_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
10703
10708 #define HWBRREFENC_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_HWBRREFENC_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
10709
10714 #define HWBRREFENC_PARAM(modno,parno) Sysvar[HWBRREFENC_PARAM_INDEX((modno),(parno))]
10715
10718 #define HWBRREFENC_PARAM_MAX 12
10719
10737 #define HWBRREFENC_PISRC_REFSIGA 10
10738
10756 #define HWBRREFENC_PISRC_REFSIGB 11
10757
10758
10759 //=================================================================================================================
10760 // 0x4320 HWREFBUS_PARAM - HW Reference Bus Parameters
10761 //=================================================================================================================
10765 #define SDOINDEX_HWREFBUS_PARAM 0x4320
10766
10771 #define HWREFBUS_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWREFBUS_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
10772
10777 #define HWREFBUS_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_HWREFBUS_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
10778
10783 #define HWREFBUS_PARAM(modno,parno) Sysvar[HWREFBUS_PARAM_INDEX((modno),(parno))]
10784
10787 #define HWREFBUS_PARAM_MAX 32
10788
10789 //=================================================================================================================
10790 // 0x4400 BUSMOD_PARAM - Bus Module Parameters
10791 //=================================================================================================================
10795 #define SDOINDEX_BUSMOD_PARAM 0x4400
10796
10801 #define BUSMOD_PARAM_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_BUSMOD_PARAM<<8)) | (((long) (modno))<<8) | ((long) (parno)))
10802
10807 #define BUSMOD_PARAM_SRCINDEX(modno,parno) ((SDOINDEX_BUSMOD_PARAM<<8) | (((long) (modno))<<8) | ((long) (parno)))
10808
10813 #define BUSMOD_PARAM(modno,parno) Sysvar[BUSMOD_PARAM_INDEX((modno),(parno))]
10814
10817 #define BUSMOD_PARAM_MAX 69
10818
10839 #define BUSMOD_MODE 1
10840
10848 #define BUSMOD_TYPE 2
10849
10856 #define BUSMOD_TYPE_AXES 3
10857
10864 #define BUSMOD_PISRC_INPUT1 10
10865
10872 #define BUSMOD_PISRC_INPUT2 11
10873
10880 #define BUSMOD_PISRC_INPUT3 12
10881
10888 #define BUSMOD_PISRC_INPUT4 13
10889
10896 #define BUSMOD_PISRC_INPUT5 14
10897
10904 #define BUSMOD_PISRC_INPUT6 15
10905
10912 #define BUSMOD_PISRC_INPUT7 16
10913
10920 #define BUSMOD_PISRC_INPUT8 17
10921
10928 #define BUSMOD_LEN_TXPDO1 22
10929
10936 #define BUSMOD_LEN_TXPDO2 23
10937
10944 #define BUSMOD_LEN_TXPDO3 24
10945
10952 #define BUSMOD_LEN_TXPDO4 25
10953
10960 #define BUSMOD_LEN_RXPDO1 26
10961
10968 #define BUSMOD_LEN_RXPDO2 27
10969
10976 #define BUSMOD_LEN_RXPDO3 28
10977
10984 #define BUSMOD_LEN_RXPDO4 29
10985
10996 #define BUSMOD_BUSTYPE 30
10997
11006 #define BUSMOD_BUSNO 31
11007
11017 #define BUSMOD_ID 32
11018
11032 #define BUSMOD_SYNC 33
11033
11047 #define BUSMOD_GUARDTIME 35
11048
11056 #define BUSMOD_INHIBITTIME 36
11057
11066 #define BUSMOD_EVENTTIME 37
11067
11075 #define BUSMOD_TXOFFSET 38
11076
11084 #define BUSMOD_RXOFFSET 39
11085
11097 #define BUSMOD_TXMAP_INPUT1 41
11098
11110 #define BUSMOD_TXMAP_INPUT2 42
11111
11123 #define BUSMOD_TXMAP_INPUT3 43
11124
11136 #define BUSMOD_TXMAP_INPUT4 44
11137
11149 #define BUSMOD_TXMAP_INPUT5 45
11150
11162 #define BUSMOD_TXMAP_INPUT6 46
11163
11175 #define BUSMOD_TXMAP_INPUT7 47
11176
11188 #define BUSMOD_TXMAP_INPUT8 48
11189
11202 #define BUSMOD_RXMAP_POVALUE1 61
11203
11216 #define BUSMOD_RXMAP_POVALUE2 62
11217
11230 #define BUSMOD_RXMAP_POVALUE3 63
11231
11244 #define BUSMOD_RXMAP_POVALUE4 64
11245
11258 #define BUSMOD_RXMAP_POVALUE5 65
11259
11272 #define BUSMOD_RXMAP_POVALUE6 66
11273
11286 #define BUSMOD_RXMAP_POVALUE7 67
11287
11300 #define BUSMOD_RXMAP_POVALUE8 68
11301
11302
11303 // Values for BUSMOD_MODE:
11304 #define BUSMOD_MODE_DEACTIVATE 0 // Deactivate
11305 #define BUSMOD_MODE_ACTIVATE 1 // Activate
11306 #define BUSMOD_MODE_ACTIVATE_NOSTOP 2 // Activate (only deleted in case of 0 or newstart mocexe)
11307
11308 // Values for BUSMOD_BUSTYPE:
11309 #define BUSMOD_BUSTYPE_CAN 0 // CAN bus
11310 #define BUSMOD_BUSTYPE_ECAT_S 1 // EtherCAT Slave (not implemented yet)
11311 #define BUSMOD_BUSTYPE_ECAT_M 2 // EtherCAT Master
11312
11313 // Values for BUSMOD_BUSNO:
11314 #define BUSMOD_BUSNO_CAN1 0 // CAN bus number 1
11315 #define BUSMOD_BUSNO_CAN2 1 // CAN bus number 2
11316
11317 //=================================================================================================================
11318 // 0x4800 HWAMP_PROCESS - HW Amplifier Process Data
11319 //=================================================================================================================
11323 #define SDOINDEX_HWAMP_PROCESS 0x4800
11324
11329 #define HWAMP_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWAMP_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
11330
11335 #define HWAMP_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_HWAMP_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
11336
11341 #define HWAMP_PROCESS(modno,parno) Sysvar[HWAMP_PROCESS_INDEX((modno),(parno))]
11342
11345 #define HWAMP_PROCESS_MAX 86
11346
11350 #define PO_HWAMP_STATUS 1
11351
11357 #define PO_HWAMP_CURRENT 2
11358
11362 #define PO_HWAMP_HALLPOS 6
11363
11367 #define PO_HWAMP_SUPPLYVOLTAGE 8
11368
11372 #define PO_HWAMP_POWERFAIL 9
11373
11377 #define PO_HWAMP_USERDEFINED_DATA0 13
11378
11382 #define PO_HWAMP_USERDEFINED_DATA1 14
11383
11387 #define PO_HWAMP_USERDEFINED_DATA2 15
11388
11392 #define PO_HWAMP_USERDEFINED_DATA3 16
11393
11400 #define PO_HWAMP_TEMP1 17
11401
11408 #define PO_HWAMP_TEMP2 18
11409
11416 #define PO_HWAMP_VOLT1 19
11417
11424 #define PO_HWAMP_VOLT2 20
11425
11430 #define PO_HWAMP_PABS 21
11431
11438 #define PO_HWAMP_PABSVEL 22
11439
11444 #define PO_HWAMP_HALL_POSEL 23
11445
11451 #define PO_HWAMP_HALL_POSRAW 24
11452
11457 #define PO_HWAMP_ELPOS_POSEL 25
11458
11463 #define PO_HWAMP_ELPOS_POSENC 26
11464
11469 #define PO_HWAMP_COSSIN_COS 27
11470
11475 #define PO_HWAMP_COSSIN_SIN 28
11476
11481 #define PO_HWAMP_VEL_VEL 29
11482
11489 #define PO_HWAMP_VEL_VELRAW 30
11490
11498 #define PO_HWAMP_IPH_U 31
11499
11507 #define PO_HWAMP_IPH_V 32
11508
11516 #define PO_HWAMP_IPH_W 33
11517
11525 #define PO_HWAMP_IPHFIL_U 34
11526
11534 #define PO_HWAMP_IPHFIL_V 35
11535
11543 #define PO_HWAMP_IPHFIL_W 36
11544
11549 #define PO_HWAMP_IPHI2T_U 37
11550
11555 #define PO_HWAMP_IPHI2T_V 38
11556
11561 #define PO_HWAMP_IPHI2T_W 39
11562
11569 #define PO_HWAMP_IDQ_D 40
11570
11577 #define PO_HWAMP_IDQ_Q 41
11578
11583 #define PO_HWAMP_DCPH_U 42
11584
11589 #define PO_HWAMP_DCPH_V 43
11590
11595 #define PO_HWAMP_DCPH_W 44
11596
11601 #define PO_HWAMP_DCDQ_D 45
11602
11607 #define PO_HWAMP_DCDQ_Q 46
11608
11613 #define PO_HWAMP_ENPH_U 47
11614
11619 #define PO_HWAMP_ENPH_V 48
11620
11625 #define PO_HWAMP_ENPH_W 49
11626
11631 #define PO_HWAMP_VELPI_ACTUAL 50
11632
11637 #define PO_HWAMP_VELPI_REF 51
11638
11643 #define PO_HWAMP_VELPI_ERR 52
11644
11649 #define PO_HWAMP_VELPI_OUT 53
11650
11655 #define PO_HWAMP_VELPI_ACTINTSUM 54
11656
11663 #define PO_HWAMP_CURPI0_ACTUAL 55
11664
11671 #define PO_HWAMP_CURPI0_REF 56
11672
11679 #define PO_HWAMP_CURPI0_ERR 57
11680
11685 #define PO_HWAMP_CURPI0_OUT 58
11686
11693 #define PO_HWAMP_CURPI0_ACTINTSUM 59
11694
11701 #define PO_HWAMP_CURPI1_ACTUAL 60
11702
11709 #define PO_HWAMP_CURPI1_REF 61
11710
11717 #define PO_HWAMP_CURPI1_ERR 62
11718
11723 #define PO_HWAMP_CURPI1_OUT 63
11724
11731 #define PO_HWAMP_CURPI1_ACTINTSUM 64
11732
11737 #define PO_HWAMP_SET1_0 65
11738
11743 #define PO_HWAMP_SET1_1 66
11744
11749 #define PO_HWAMP_SET1_2 67
11750
11755 #define PO_HWAMP_SET1_3 68
11756
11761 #define PO_HWAMP_SET1_4 69
11762
11767 #define PO_HWAMP_SET1_5 70
11768
11773 #define PO_HWAMP_SET2_0 71
11774
11779 #define PO_HWAMP_SET2_1 72
11780
11785 #define PO_HWAMP_SET2_2 73
11786
11791 #define PO_HWAMP_SET2_3 74
11792
11797 #define PO_HWAMP_SET2_4 75
11798
11803 #define PO_HWAMP_SET2_5 76
11804
11809 #define PO_HWAMP_ELPOS_LAG 77
11810
11815 #define PO_HWAMP_ELPOS_DELTA 78
11816
11821 #define PO_HWAMP_STEPPOS_POSEL 79
11822
11828 #define PO_HWAMP_REF 80
11829
11835 #define PO_HWAMP_FF 81
11836
11842 #define PO_HWAMP_STEPPOS_CURLOOPINDEX 82
11843
11852 #define PO_HWAMP_HALL_ERRORCOUNT 83
11853
11863 #define PO_HWAMP_TEMP_MOT 84
11864
11871 #define PO_HWAMP_TOTAL_CURRENT 85
11872
11873
11874 // Values for PO_HWAMP_STATUS:
11875 #define PO_HWAMP_STATUS_ENABLED 0x00001 // Axis is enabled, its half bridges cannot be assigned to other axes
11876 #define PO_HWAMP_STATUS_RUNNING 0x00002 // Axis is running, velocity and/or current control is executed
11877 #define PO_HWAMP_STATUS_UNDERVOLTAGE 0x00004 // DC supply voltage has fallen below the min. level (HWAMP_VOLT_MIN) while axis is in RUNNING state
11878 #define PO_HWAMP_STATUS_OVERVOLTAGE 0x00008 // DC supply voltage has risen above the max. level (HWAMP_VOLT_MAX)
11879 #define PO_HWAMP_STATUS_HW_OVERCURRENT_ABS 0x00010 // Error detected by the hardware-based overcurrent protection of any axis
11880 #define PO_HWAMP_STATUS_SW_OVERCURRENT_ABS 0x00020 // Error detected by the software-based overcurrent protection
11881 #define PO_HWAMP_STATUS_SW_OVERCURRENT_I2T 0x00040 // I2T protection has detected an overload incident
11882 #define PO_HWAMP_STATUS_OVERTEMPERATURE 0x00080 // Internal temperature has risen above the max. level
11883 #define PO_HWAMP_STATUS_DSP_LINK 0x00100 // MACS5 only: Communication problem between amplifier and controller
11884 #define PO_HWAMP_STATUS_MOSFETDRIVER_SUPPLY 0x00200 // MOSFET driver supply failed
11885 #define PO_HWAMP_STATUS_ADC 0x00400 // MACS5 only: ADC failed
11886 #define PO_HWAMP_STATUS_HALL 0x00800 // Hall sensor problem
11887 #define PO_HWAMP_STATUS_HALL_ANGLE 0x01000 // Hall or encoder sensor problem
11888 #define PO_HWAMP_STATUS_NOT_YET_READY 0x10000 // Only MiniMACS6: Axis not yet ready. After setting COMMTYPE, it takes 7ms for calibration. Do not call AxisControll() before!
11889
11890 // Values for PO_HWAMP_TEMP1:
11891 #define PO_HWAMP_TEMP_INVALID 0x7FFF // Temperature is invalid. Temperature sensor may be not connected or defect.
11892
11893 // Values for PO_HWAMP_TEMP2:
11894 #define PO_HWAMP__TEMP_INVALID 0x7FFF // Temperature is invalid. Temperature sensor may be not connected or defect.
11895
11896 // Values for PO_HWAMP_HALL_ERRORCOUNT:
11897 #define PO_HWAMP_HALL_ERRORCOUNT_MAX 0xFFFF // Max value of PO_HWAMP_HALL_ERRORCOUNT
11898
11899 // Values for PO_HWAMP_TEMP_MOT:
11900 #define PO_HWAMP_TEMP_INVALID 0x7FFF // Temperature is invalid. Temperature sensor may be not connected or defect.
11901
11902 //=================================================================================================================
11903 // 0x4840 HWENC_PROCESS - HW Encoder Process Data
11904 //=================================================================================================================
11908 #define SDOINDEX_HWENC_PROCESS 0x4840
11909
11914 #define HWENC_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWENC_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
11915
11920 #define HWENC_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_HWENC_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
11921
11926 #define HWENC_PROCESS(modno,parno) Sysvar[HWENC_PROCESS_INDEX((modno),(parno))]
11927
11930 #define HWENC_PROCESS_MAX 2
11931
11935 #define PO_HWENCODER_ERROR 1
11936
11937
11938 // Values for PO_HWENCODER_ERROR:
11939 #define HWENCODER_ERROR_CRC 0x01 // CRC check fault
11940 #define HWENCODER_ERROR_SYNC 0x02 // EnDat sync fault
11941 #define HWENCODER_ERROR_TRANSFERTIME 0x04 // Too little time to transfer data, increase encoder frequency
11942 #define HWENCODER_ERROR_SIGNAL 0x08 // Encoder signal quality monitoring
11943
11944 //=================================================================================================================
11945 // 0x4870 HWHALL_PROCESS - HW Hall Sensor Process Data
11946 //=================================================================================================================
11950 #define SDOINDEX_HWHALL_PROCESS 0x4870
11951
11956 #define HWHALL_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWHALL_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
11957
11962 #define HWHALL_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_HWHALL_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
11963
11968 #define HWHALL_PROCESS(modno,parno) Sysvar[HWHALL_PROCESS_INDEX((modno),(parno))]
11969
11972 #define HWHALL_PROCESS_MAX 4
11973
11977 #define PO_HWHALL_STATUS 1
11978
11982 #define PO_HWHALL_POS 2
11983
11990 #define PO_HWHALL_VEL 3
11991
11992
11993 //=================================================================================================================
11994 // 0x4880 HWCOUNTINC_PROCESS - HW Counter-inc Process Data
11995 //=================================================================================================================
11999 #define SDOINDEX_HWCOUNTINC_PROCESS 0x4880
12000
12005 #define HWCOUNTINC_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWCOUNTINC_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
12006
12011 #define HWCOUNTINC_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_HWCOUNTINC_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
12012
12017 #define HWCOUNTINC_PROCESS(modno,parno) Sysvar[HWCOUNTINC_PROCESS_INDEX((modno),(parno))]
12018
12021 #define HWCOUNTINC_PROCESS_MAX 12
12022
12030 #define PO_HWCNTINC_VALUE 1
12031
12039 #define PO_HWCNTINC_VELOCITY 2
12040
12048 #define PO_HWCNTINC_STATUS 3
12049
12058 #define PO_HWCNTINC_LASTVALUE 4
12059
12066 #define PO_HWCNTINC_SINCOSPART 5
12067
12075 #define PO_HWCNTINC_INCPART 8
12076
12086 #define PO_HWCNTINC_SINCOS_DEBUG 9
12087
12094 #define PO_HWCNTINC_SINCOS_DEBUG2 10
12095
12099 #define PO_HWCNTINC_SINCOS_DEBUG3 11
12100
12101
12102 //=================================================================================================================
12103 // 0x48C0 HWCOUNTABS_PROCESS - HW Counter-abs Process Data
12104 //=================================================================================================================
12108 #define SDOINDEX_HWCOUNTABS_PROCESS 0x48C0
12109
12114 #define HWCOUNTABS_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWCOUNTABS_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
12115
12120 #define HWCOUNTABS_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_HWCOUNTABS_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
12121
12126 #define HWCOUNTABS_PROCESS(modno,parno) Sysvar[HWCOUNTABS_PROCESS_INDEX((modno),(parno))]
12127
12130 #define HWCOUNTABS_PROCESS_MAX 3
12131
12139 #define PO_HWCNTABS_VALUE 1
12140
12146 #define PO_HWCNTABS_RAW 2
12147
12148
12149 //=================================================================================================================
12150 // 0x4900 HWCOUNTUNI_PROCESS - HW Counter-abs Process Data
12151 //=================================================================================================================
12155 #define SDOINDEX_HWCOUNTUNI_PROCESS 0x4900
12156
12161 #define HWCOUNTUNI_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWCOUNTUNI_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
12162
12167 #define HWCOUNTUNI_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_HWCOUNTUNI_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
12168
12173 #define HWCOUNTUNI_PROCESS(modno,parno) Sysvar[HWCOUNTUNI_PROCESS_INDEX((modno),(parno))]
12174
12177 #define HWCOUNTUNI_PROCESS_MAX 3
12178
12184 #define PO_HWCNTUNI_VALUE 1
12185
12189 #define PO_HWCNTUNI_VELOCITY 2
12190
12191
12192 //=================================================================================================================
12193 // 0x4920 HWCMPUNI_PROCESS - HW Comparator-universal Process Data
12194 //=================================================================================================================
12198 #define SDOINDEX_HWCMPUNI_PROCESS 0x4920
12199
12204 #define HWCMPUNI_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWCMPUNI_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
12205
12210 #define HWCMPUNI_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_HWCMPUNI_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
12211
12216 #define HWCMPUNI_PROCESS(modno,parno) Sysvar[HWCMPUNI_PROCESS_INDEX((modno),(parno))]
12217
12220 #define HWCMPUNI_PROCESS_MAX 2
12221
12222 //=================================================================================================================
12223 // 0x4940 HWLATCH_PROCESS - HW Latch Register Process Data
12224 //=================================================================================================================
12228 #define SDOINDEX_HWLATCH_PROCESS 0x4940
12229
12234 #define HWLATCH_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWLATCH_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
12235
12240 #define HWLATCH_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_HWLATCH_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
12241
12246 #define HWLATCH_PROCESS(modno,parno) Sysvar[HWLATCH_PROCESS_INDEX((modno),(parno))]
12247
12250 #define HWLATCH_PROCESS_MAX 10
12251
12258 #define PO_HWLATCH_VALUE 1
12259
12265 #define PO_HWLATCH_FLAG 2
12266
12270 #define PO_HWLATCH_COUNT 3
12271
12276 #define PO_HWLATCH_AMOUNT_IN_FIFO 4
12277
12284 #define PO_HWLATCH_FIFOREAD 5
12285
12290 #define PO_HWLATCH_FIFO_WRITEINDEX 6
12291
12296 #define PO_HWLATCH_FIFO_READINDEX 7
12297
12302 #define PO_HWLATCH_FIFO_STAT 8
12303
12311 #define PO_HWLATCH_FIFO_PEEK 9
12312
12313
12314 //=================================================================================================================
12315 // 0x4980 HWSIGGEN_PROCESS - HW Signalgen (Enc/Pulse) Process Data
12316 //=================================================================================================================
12320 #define SDOINDEX_HWSIGGEN_PROCESS 0x4980
12321
12326 #define HWSIGGEN_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWSIGGEN_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
12327
12332 #define HWSIGGEN_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_HWSIGGEN_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
12333
12338 #define HWSIGGEN_PROCESS(modno,parno) Sysvar[HWSIGGEN_PROCESS_INDEX((modno),(parno))]
12339
12342 #define HWSIGGEN_PROCESS_MAX 4
12343
12344 //=================================================================================================================
12345 // 0x49C0 HWDDS_PROCESS - HW DDS Process Data
12346 //=================================================================================================================
12350 #define SDOINDEX_HWDDS_PROCESS 0x49C0
12351
12356 #define HWDDS_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWDDS_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
12357
12362 #define HWDDS_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_HWDDS_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
12363
12368 #define HWDDS_PROCESS(modno,parno) Sysvar[HWDDS_PROCESS_INDEX((modno),(parno))]
12369
12372 #define HWDDS_PROCESS_MAX 1
12373
12374 //=================================================================================================================
12375 // 0x49D0 HWPWMGEN_PROCESS - HW PWM Generators Process Data
12376 //=================================================================================================================
12380 #define SDOINDEX_HWPWMGEN_PROCESS 0x49D0
12381
12386 #define HWPWMGEN_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWPWMGEN_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
12387
12392 #define HWPWMGEN_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_HWPWMGEN_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
12393
12398 #define HWPWMGEN_PROCESS(modno,parno) Sysvar[HWPWMGEN_PROCESS_INDEX((modno),(parno))]
12399
12402 #define HWPWMGEN_PROCESS_MAX 2
12403
12409 #define PO_HWPWMGEN_VALUE 1
12410
12411
12412 //=================================================================================================================
12413 // 0x49E0 HWPULSGEN_PROCESS - HW Pulsgen Process Data
12414 //=================================================================================================================
12418 #define SDOINDEX_HWPULSGEN_PROCESS 0x49E0
12419
12424 #define HWPULSGEN_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWPULSGEN_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
12425
12430 #define HWPULSGEN_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_HWPULSGEN_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
12431
12436 #define HWPULSGEN_PROCESS(modno,parno) Sysvar[HWPULSGEN_PROCESS_INDEX((modno),(parno))]
12437
12440 #define HWPULSGEN_PROCESS_MAX 1
12441
12442 //=================================================================================================================
12443 // 0x49F0 HWSHIFTREG_PROCESS - HW Shift Register Process Data
12444 //=================================================================================================================
12448 #define SDOINDEX_HWSHIFTREG_PROCESS 0x49F0
12449
12454 #define HWSHIFTREG_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWSHIFTREG_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
12455
12460 #define HWSHIFTREG_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_HWSHIFTREG_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
12461
12466 #define HWSHIFTREG_PROCESS(modno,parno) Sysvar[HWSHIFTREG_PROCESS_INDEX((modno),(parno))]
12467
12470 #define HWSHIFTREG_PROCESS_MAX 1
12471
12472 //=================================================================================================================
12473 // 0x4A00 HWDIGIN_PROCESS - HW Digital Input Process Data
12474 //=================================================================================================================
12478 #define SDOINDEX_HWDIGIN_PROCESS 0x4A00
12479
12484 #define HWDIGIN_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWDIGIN_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
12485
12490 #define HWDIGIN_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_HWDIGIN_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
12491
12496 #define HWDIGIN_PROCESS(modno,parno) Sysvar[HWDIGIN_PROCESS_INDEX((modno),(parno))]
12497
12500 #define HWDIGIN_PROCESS_MAX 8
12501
12505 #define PO_HWDIGIN_VALLONG 1
12506
12510 #define PO_HWDIGIN_VALWORD1 2
12511
12515 #define PO_HWDIGIN_VALWORD2 3
12516
12520 #define PO_HWDIGIN_VALBYTE1 4
12521
12525 #define PO_HWDIGIN_VALBYTE2 5
12526
12530 #define PO_HWDIGIN_VALBYTE3 6
12531
12535 #define PO_HWDIGIN_VALBYTE4 7
12536
12537
12538 //=================================================================================================================
12539 // 0x4A40 HWDIGOUT_PROCESS - HW Digital Output Process Data
12540 //=================================================================================================================
12544 #define SDOINDEX_HWDIGOUT_PROCESS 0x4A40
12545
12550 #define HWDIGOUT_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWDIGOUT_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
12551
12556 #define HWDIGOUT_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_HWDIGOUT_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
12557
12562 #define HWDIGOUT_PROCESS(modno,parno) Sysvar[HWDIGOUT_PROCESS_INDEX((modno),(parno))]
12563
12566 #define HWDIGOUT_PROCESS_MAX 3
12567
12571 #define PO_HWDIGOUT_VALUE 1
12572
12578 #define PO_HWDIGOUT_FORCEVALUE 2
12579
12580
12581 //=================================================================================================================
12582 // 0x4A80 HWANIN_PROCESS - HW Analog Input Process Data
12583 //=================================================================================================================
12587 #define SDOINDEX_HWANIN_PROCESS 0x4A80
12588
12593 #define HWANIN_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWANIN_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
12594
12599 #define HWANIN_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_HWANIN_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
12600
12605 #define HWANIN_PROCESS(modno,parno) Sysvar[HWANIN_PROCESS_INDEX((modno),(parno))]
12606
12609 #define HWANIN_PROCESS_MAX 5
12610
12614 #define PO_HWANIN_VALUE 1
12615
12619 #define PO_HWANIN_UNFILT 2
12620
12624 #define PO_HWANIN_MAXVAL 3
12625
12629 #define PO_HWANIN_MINVAL 4
12630
12631
12632 //=================================================================================================================
12633 // 0x4AC0 HWANOUT_PROCESS - HW Analog Output Process Data
12634 //=================================================================================================================
12638 #define SDOINDEX_HWANOUT_PROCESS 0x4AC0
12639
12644 #define HWANOUT_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWANOUT_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
12645
12650 #define HWANOUT_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_HWANOUT_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
12651
12656 #define HWANOUT_PROCESS(modno,parno) Sysvar[HWANOUT_PROCESS_INDEX((modno),(parno))]
12657
12660 #define HWANOUT_PROCESS_MAX 3
12661
12662 #define PO_HWANOUT_VALUE 1
12663
12667 #define PO_HWANOUT_FORCEVALUE 2
12668
12669
12670 //=================================================================================================================
12671 // 0x4B00 HWSIGBUS_PROCESS - HW Signalbridges/bus ENC-REF Process Data
12672 //=================================================================================================================
12676 #define SDOINDEX_HWSIGBUS_PROCESS 0x4B00
12677
12682 #define HWSIGBUS_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWSIGBUS_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
12683
12688 #define HWSIGBUS_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_HWSIGBUS_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
12689
12694 #define HWSIGBUS_PROCESS(modno,parno) Sysvar[HWSIGBUS_PROCESS_INDEX((modno),(parno))]
12695
12698 #define HWSIGBUS_PROCESS_MAX 1
12699
12700 //=================================================================================================================
12701 // 0x4B10 HWBRREFENC_PROCESS - HW Signalbridges/bus REF-ENC Process Data
12702 //=================================================================================================================
12706 #define SDOINDEX_HWBRREFENC_PROCESS 0x4B10
12707
12712 #define HWBRREFENC_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWBRREFENC_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
12713
12718 #define HWBRREFENC_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_HWBRREFENC_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
12719
12724 #define HWBRREFENC_PROCESS(modno,parno) Sysvar[HWBRREFENC_PROCESS_INDEX((modno),(parno))]
12725
12728 #define HWBRREFENC_PROCESS_MAX 1
12729
12730 //=================================================================================================================
12731 // 0x4B20 HWREFBUS_PROCESS - HW Reference Bus Process Data
12732 //=================================================================================================================
12736 #define SDOINDEX_HWREFBUS_PROCESS 0x4B20
12737
12742 #define HWREFBUS_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_HWREFBUS_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
12743
12748 #define HWREFBUS_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_HWREFBUS_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
12749
12754 #define HWREFBUS_PROCESS(modno,parno) Sysvar[HWREFBUS_PROCESS_INDEX((modno),(parno))]
12755
12758 #define HWREFBUS_PROCESS_MAX 3
12759
12763 #define HWREFBUS_PO_REG0 1
12764
12768 #define HWREFBUS_PO_REG1 2
12769
12770
12771 //=================================================================================================================
12772 // 0x4C00 BUSMOD_PROCESS - Bus Module Process Data
12773 //=================================================================================================================
12777 #define SDOINDEX_BUSMOD_PROCESS 0x4C00
12778
12783 #define BUSMOD_PROCESS_INDEX(modno,parno) ((0x01000000 | (SDOINDEX_BUSMOD_PROCESS<<8)) | (((long) (modno))<<8) | ((long) (parno)))
12784
12789 #define BUSMOD_PROCESS_SRCINDEX(modno,parno) ((SDOINDEX_BUSMOD_PROCESS<<8) | (((long) (modno))<<8) | ((long) (parno)))
12790
12795 #define BUSMOD_PROCESS(modno,parno) Sysvar[BUSMOD_PROCESS_INDEX((modno),(parno))]
12796
12799 #define BUSMOD_PROCESS_MAX 39
12800
12804 #define PO_BUSMOD_VALUE1 1
12805
12809 #define PO_BUSMOD_VALUE2 2
12810
12814 #define PO_BUSMOD_VALUE3 3
12815
12819 #define PO_BUSMOD_VALUE4 4
12820
12824 #define PO_BUSMOD_VALUE5 5
12825
12829 #define PO_BUSMOD_VALUE6 6
12830
12834 #define PO_BUSMOD_VALUE7 7
12835
12839 #define PO_BUSMOD_VALUE8 8
12840
12845 #define PO_BUSMOD_LASTERROR 23
12846
12850 #define PO_BUSMOD_LASTRXTIME 24
12851
12856 #define PO_BUSMOD_LASTTXTIME 25
12857
12862 #define PO_BUSMOD_OBJ_TXPDO1 26
12863
12868 #define PO_BUSMOD_OBJ_TXPDO2 27
12869
12874 #define PO_BUSMOD_OBJ_TXPDO3 28
12875
12880 #define PO_BUSMOD_OBJ_TXPDO4 29
12881
12886 #define PO_BUSMOD_OBJ_RXPDO1 30
12887
12892 #define PO_BUSMOD_OBJ_RXPDO2 31
12893
12898 #define PO_BUSMOD_OBJ_RXPDO3 32
12899
12904 #define PO_BUSMOD_OBJ_RXPDO4 33
12905
12911 #define PO_BUSMOD_DEVTYPE 34
12912
12916 #define PO_BUSMOD_TIMER_TXPDO1 35
12917
12921 #define PO_BUSMOD_TIMER_TXPDO2 36
12922
12926 #define PO_BUSMOD_TIMER_TXPDO3 37
12927
12931 #define PO_BUSMOD_TIMER_TXPDO4 38
12932
12933
12934 //=================================================================================================================

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